1 #include "gen_arm_new_nodes.h" 4 #include "arm_bearch_t.h" 5 #include "gen_arm_regalloc_if.h" 6 #include "arm_new_nodes_t.h" 11 ir_op *op_arm_AdC = NULL;
12 ir_op *op_arm_AdC_t = NULL;
13 ir_op *op_arm_Add = NULL;
14 ir_op *op_arm_AddS = NULL;
15 ir_op *op_arm_AddS_t = NULL;
16 ir_op *op_arm_Address = NULL;
17 ir_op *op_arm_Adf = NULL;
18 ir_op *op_arm_And = NULL;
19 ir_op *op_arm_B = NULL;
20 ir_op *op_arm_Bcc = NULL;
21 ir_op *op_arm_Bic = NULL;
22 ir_op *op_arm_Bl = NULL;
23 ir_op *op_arm_Clz = NULL;
24 ir_op *op_arm_Cmfe = NULL;
25 ir_op *op_arm_Cmn = NULL;
26 ir_op *op_arm_Cmp = NULL;
27 ir_op *op_arm_Dvf = NULL;
28 ir_op *op_arm_Eor = NULL;
29 ir_op *op_arm_Flt = NULL;
30 ir_op *op_arm_FrameAddr = NULL;
31 ir_op *op_arm_IJmp = NULL;
32 ir_op *op_arm_Ldf = NULL;
33 ir_op *op_arm_Ldr = NULL;
34 ir_op *op_arm_LinkLdrPC = NULL;
35 ir_op *op_arm_LinkMovPC = NULL;
36 ir_op *op_arm_Mla = NULL;
37 ir_op *op_arm_Mls = NULL;
38 ir_op *op_arm_Mov = NULL;
39 ir_op *op_arm_Muf = NULL;
40 ir_op *op_arm_Mul = NULL;
41 ir_op *op_arm_Mvf = NULL;
42 ir_op *op_arm_Mvn = NULL;
43 ir_op *op_arm_OrPl_t = NULL;
44 ir_op *op_arm_Orr = NULL;
45 ir_op *op_arm_OrrPl = NULL;
46 ir_op *op_arm_Pkhbt = NULL;
47 ir_op *op_arm_Pkhtb = NULL;
48 ir_op *op_arm_Return = NULL;
49 ir_op *op_arm_RsC = NULL;
50 ir_op *op_arm_Rsb = NULL;
51 ir_op *op_arm_RsbS = NULL;
52 ir_op *op_arm_SMulL = NULL;
53 ir_op *op_arm_SMulL_t = NULL;
54 ir_op *op_arm_SbC = NULL;
55 ir_op *op_arm_SbC_t = NULL;
56 ir_op *op_arm_Stf = NULL;
57 ir_op *op_arm_Str = NULL;
58 ir_op *op_arm_Sub = NULL;
59 ir_op *op_arm_SubS = NULL;
60 ir_op *op_arm_SubS_t = NULL;
61 ir_op *op_arm_Suf = NULL;
62 ir_op *op_arm_SwitchJmp = NULL;
63 ir_op *op_arm_Tst = NULL;
64 ir_op *op_arm_UMulL = NULL;
65 ir_op *op_arm_UMulL_t = NULL;
66 ir_op *op_arm_fConst = NULL;
69 static int arm_opcode_start = -1;
72 #define arm_op_tag FOURCC('a', 'r', 'm', '\0') 75 int is_arm_op(
const ir_op *op)
77 return get_op_tag(op) == arm_op_tag;
81 int is_arm_irn(
const ir_node *node)
86 int get_arm_irn_opcode(
const ir_node *node)
88 assert(is_arm_irn(node));
93 #define BIT(x) (1 << (x)) 96 static const arch_register_req_t arm_requirements_gp_not_in_r0 = {
97 .cls = &arm_reg_classes[CLASS_arm_gp],
100 .must_be_different = 1,
104 static const arch_register_req_t arm_requirements_gp_in_r2 = {
105 .cls = &arm_reg_classes[CLASS_arm_gp],
108 .must_be_different = 0,
116 static arch_register_req_t
const *in_reqs[] = {
117 &arm_class_reg_req_gp,
118 &arm_class_reg_req_flags,
131 arch_irn_flags_t irn_flags = arch_irn_flags_none;
137 init_arm_attributes(res, irn_flags, in_reqs, n_res);
138 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
139 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
140 out_infos[0].req = &arm_class_reg_req_gp;
148 static arch_register_req_t
const *in_reqs[] = {
149 &arm_class_reg_req_gp,
150 &arm_class_reg_req_gp,
151 &arm_class_reg_req_flags,
165 arch_irn_flags_t irn_flags = arch_irn_flags_none;
171 init_arm_attributes(res, irn_flags, in_reqs, n_res);
172 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
173 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
174 out_infos[0].req = &arm_class_reg_req_gp;
182 static arch_register_req_t
const *in_reqs[] = {
183 &arm_class_reg_req_gp,
184 &arm_class_reg_req_gp,
185 &arm_class_reg_req_flags,
199 arch_irn_flags_t irn_flags = arch_irn_flags_none;
205 init_arm_attributes(res, irn_flags, in_reqs, n_res);
206 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
207 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
208 out_infos[0].req = &arm_class_reg_req_gp;
216 static arch_register_req_t
const *in_reqs[] = {
217 &arm_class_reg_req_gp,
218 &arm_class_reg_req_gp,
219 &arm_class_reg_req_gp,
220 &arm_class_reg_req_flags,
235 arch_irn_flags_t irn_flags = arch_irn_flags_none;
241 init_arm_attributes(res, irn_flags, in_reqs, n_res);
242 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
243 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
244 out_infos[0].req = &arm_class_reg_req_gp;
264 arch_irn_flags_t irn_flags = arch_irn_flags_none;
268 (void)irn_flags, (
void)n_res;
276 static arch_register_req_t
const *in_reqs[] = {
277 &arm_class_reg_req_gp,
289 arch_irn_flags_t irn_flags = arch_irn_flags_none;
290 irn_flags |= arch_irn_flag_rematerializable;
296 init_arm_attributes(res, irn_flags, in_reqs, n_res);
297 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
298 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
299 out_infos[0].req = &arm_class_reg_req_gp;
307 static arch_register_req_t
const *in_reqs[] = {
308 &arm_class_reg_req_gp,
309 &arm_class_reg_req_gp,
322 arch_irn_flags_t irn_flags = arch_irn_flags_none;
323 irn_flags |= arch_irn_flag_rematerializable;
329 init_arm_attributes(res, irn_flags, in_reqs, n_res);
330 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
331 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
332 out_infos[0].req = &arm_class_reg_req_gp;
340 static arch_register_req_t
const *in_reqs[] = {
341 &arm_class_reg_req_gp,
342 &arm_class_reg_req_gp,
355 arch_irn_flags_t irn_flags = arch_irn_flags_none;
356 irn_flags |= arch_irn_flag_rematerializable;
362 init_arm_attributes(res, irn_flags, in_reqs, n_res);
363 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
364 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
365 out_infos[0].req = &arm_class_reg_req_gp;
373 static arch_register_req_t
const *in_reqs[] = {
374 &arm_class_reg_req_gp,
375 &arm_class_reg_req_gp,
376 &arm_class_reg_req_gp,
390 arch_irn_flags_t irn_flags = arch_irn_flags_none;
391 irn_flags |= arch_irn_flag_rematerializable;
397 init_arm_attributes(res, irn_flags, in_reqs, n_res);
398 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
399 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
400 out_infos[0].req = &arm_class_reg_req_gp;
408 static arch_register_req_t
const *in_reqs[] = {
409 &arm_class_reg_req_gp,
421 arch_irn_flags_t irn_flags = arch_irn_flags_none;
422 irn_flags |= arch_irn_flag_modify_flags;
423 irn_flags |= arch_irn_flag_rematerializable;
429 init_arm_attributes(res, irn_flags, in_reqs, n_res);
430 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
431 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
432 out_infos[0].req = &arm_class_reg_req_gp;
433 out_infos[1].req = &arm_class_reg_req_flags;
441 static arch_register_req_t
const *in_reqs[] = {
442 &arm_class_reg_req_gp,
443 &arm_class_reg_req_gp,
456 arch_irn_flags_t irn_flags = arch_irn_flags_none;
457 irn_flags |= arch_irn_flag_modify_flags;
458 irn_flags |= arch_irn_flag_rematerializable;
464 init_arm_attributes(res, irn_flags, in_reqs, n_res);
465 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
466 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
467 out_infos[0].req = &arm_class_reg_req_gp;
468 out_infos[1].req = &arm_class_reg_req_flags;
476 static arch_register_req_t
const *in_reqs[] = {
477 &arm_class_reg_req_gp,
478 &arm_class_reg_req_gp,
491 arch_irn_flags_t irn_flags = arch_irn_flags_none;
492 irn_flags |= arch_irn_flag_modify_flags;
493 irn_flags |= arch_irn_flag_rematerializable;
499 init_arm_attributes(res, irn_flags, in_reqs, n_res);
500 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
501 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
502 out_infos[0].req = &arm_class_reg_req_gp;
503 out_infos[1].req = &arm_class_reg_req_flags;
511 static arch_register_req_t
const *in_reqs[] = {
512 &arm_class_reg_req_gp,
513 &arm_class_reg_req_gp,
514 &arm_class_reg_req_gp,
528 arch_irn_flags_t irn_flags = arch_irn_flags_none;
529 irn_flags |= arch_irn_flag_modify_flags;
530 irn_flags |= arch_irn_flag_rematerializable;
536 init_arm_attributes(res, irn_flags, in_reqs, n_res);
537 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
538 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
539 out_infos[0].req = &arm_class_reg_req_gp;
540 out_infos[1].req = &arm_class_reg_req_flags;
559 arch_irn_flags_t irn_flags = arch_irn_flags_none;
563 (void)irn_flags, (
void)n_res;
571 arch_register_req_t
const **
const in_reqs = NULL;
575 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Address, arm_mode_gp, 0, NULL);
578 arch_irn_flags_t irn_flags = arch_irn_flags_none;
579 irn_flags |= arch_irn_flag_rematerializable;
585 init_arm_attributes(res, irn_flags, in_reqs, n_res);
586 init_arm_Address_attributes(res, entity, offset);
587 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
588 out_infos[0].req = &arm_class_reg_req_gp;
596 static arch_register_req_t
const *in_reqs[] = {
597 &arm_class_reg_req_fpa,
598 &arm_class_reg_req_fpa,
611 arch_irn_flags_t irn_flags = arch_irn_flags_none;
612 irn_flags |= arch_irn_flag_rematerializable;
618 init_arm_attributes(res, irn_flags, in_reqs, n_res);
619 init_arm_farith_attributes(res, op_mode);
620 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
621 out_infos[0].req = &arm_class_reg_req_fpa;
629 static arch_register_req_t
const *in_reqs[] = {
630 &arm_class_reg_req_gp,
642 arch_irn_flags_t irn_flags = arch_irn_flags_none;
643 irn_flags |= arch_irn_flag_rematerializable;
649 init_arm_attributes(res, irn_flags, in_reqs, n_res);
650 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
651 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
652 out_infos[0].req = &arm_class_reg_req_gp;
660 static arch_register_req_t
const *in_reqs[] = {
661 &arm_class_reg_req_gp,
662 &arm_class_reg_req_gp,
675 arch_irn_flags_t irn_flags = arch_irn_flags_none;
676 irn_flags |= arch_irn_flag_rematerializable;
682 init_arm_attributes(res, irn_flags, in_reqs, n_res);
683 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
684 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
685 out_infos[0].req = &arm_class_reg_req_gp;
693 static arch_register_req_t
const *in_reqs[] = {
694 &arm_class_reg_req_gp,
695 &arm_class_reg_req_gp,
708 arch_irn_flags_t irn_flags = arch_irn_flags_none;
709 irn_flags |= arch_irn_flag_rematerializable;
715 init_arm_attributes(res, irn_flags, in_reqs, n_res);
716 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
717 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
718 out_infos[0].req = &arm_class_reg_req_gp;
726 static arch_register_req_t
const *in_reqs[] = {
727 &arm_class_reg_req_gp,
728 &arm_class_reg_req_gp,
729 &arm_class_reg_req_gp,
743 arch_irn_flags_t irn_flags = arch_irn_flags_none;
744 irn_flags |= arch_irn_flag_rematerializable;
750 init_arm_attributes(res, irn_flags, in_reqs, n_res);
751 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
752 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
753 out_infos[0].req = &arm_class_reg_req_gp;
761 arch_register_req_t
const **
const in_reqs = NULL;
768 arch_irn_flags_t irn_flags = arch_irn_flags_none;
769 irn_flags |= arch_irn_flag_simple_jump;
775 init_arm_attributes(res, irn_flags, in_reqs, n_res);
776 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
777 out_infos[0].req = &arch_exec_requirement;
785 static arch_register_req_t
const *in_reqs[] = {
786 &arm_class_reg_req_flags,
798 arch_irn_flags_t irn_flags = arch_irn_flags_none;
804 init_arm_attributes(res, irn_flags, in_reqs, n_res);
805 set_arm_CondJmp_relation(res, relation);
806 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
807 out_infos[0].req = &arch_exec_requirement;
808 out_infos[1].req = &arch_exec_requirement;
816 static arch_register_req_t
const *in_reqs[] = {
817 &arm_class_reg_req_gp,
829 arch_irn_flags_t irn_flags = arch_irn_flags_none;
830 irn_flags |= arch_irn_flag_rematerializable;
836 init_arm_attributes(res, irn_flags, in_reqs, n_res);
837 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
838 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
839 out_infos[0].req = &arm_class_reg_req_gp;
847 static arch_register_req_t
const *in_reqs[] = {
848 &arm_class_reg_req_gp,
849 &arm_class_reg_req_gp,
862 arch_irn_flags_t irn_flags = arch_irn_flags_none;
863 irn_flags |= arch_irn_flag_rematerializable;
869 init_arm_attributes(res, irn_flags, in_reqs, n_res);
870 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
871 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
872 out_infos[0].req = &arm_class_reg_req_gp;
880 static arch_register_req_t
const *in_reqs[] = {
881 &arm_class_reg_req_gp,
882 &arm_class_reg_req_gp,
895 arch_irn_flags_t irn_flags = arch_irn_flags_none;
896 irn_flags |= arch_irn_flag_rematerializable;
902 init_arm_attributes(res, irn_flags, in_reqs, n_res);
903 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
904 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
905 out_infos[0].req = &arm_class_reg_req_gp;
913 static arch_register_req_t
const *in_reqs[] = {
914 &arm_class_reg_req_gp,
915 &arm_class_reg_req_gp,
916 &arm_class_reg_req_gp,
930 arch_irn_flags_t irn_flags = arch_irn_flags_none;
931 irn_flags |= arch_irn_flag_rematerializable;
937 init_arm_attributes(res, irn_flags, in_reqs, n_res);
938 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
939 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
940 out_infos[0].req = &arm_class_reg_req_gp;
954 arch_irn_flags_t irn_flags = arch_irn_flags_none;
955 irn_flags |= arch_irn_flag_modify_flags;
960 init_arm_attributes(res, irn_flags, in_reqs, n_res);
961 init_arm_Address_attributes(res, entity, offset);
969 static arch_register_req_t
const *in_reqs[] = {
970 &arm_class_reg_req_gp,
982 arch_irn_flags_t irn_flags = arch_irn_flags_none;
983 irn_flags |= arch_irn_flag_rematerializable;
989 init_arm_attributes(res, irn_flags, in_reqs, n_res);
990 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
991 out_infos[0].req = &arm_class_reg_req_gp;
999 static arch_register_req_t
const *in_reqs[] = {
1000 &arm_class_reg_req_fpa,
1001 &arm_class_reg_req_fpa,
1011 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmfe, arm_mode_flags, 2, in);
1014 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1015 irn_flags |= arch_irn_flag_rematerializable;
1016 irn_flags |= arch_irn_flag_modify_flags;
1019 int const n_res = 1;
1022 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1023 init_arm_cmp_attr(res, ins_permuted,
false);
1024 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1025 out_infos[0].req = &arm_class_reg_req_flags;
1031 ir_node *new_bd_arm_Cmn_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
unsigned char immediate_value,
unsigned char immediate_rot,
bool ins_permuted,
bool is_unsigned)
1033 static arch_register_req_t
const *in_reqs[] = {
1034 &arm_class_reg_req_gp,
1043 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 1, in);
1046 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1047 irn_flags |= arch_irn_flag_rematerializable;
1048 irn_flags |= arch_irn_flag_modify_flags;
1051 int const n_res = 1;
1054 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1055 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1056 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1057 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1058 out_infos[0].req = &arm_class_reg_req_flags;
1066 static arch_register_req_t
const *in_reqs[] = {
1067 &arm_class_reg_req_gp,
1068 &arm_class_reg_req_gp,
1078 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 2, in);
1081 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1082 irn_flags |= arch_irn_flag_rematerializable;
1083 irn_flags |= arch_irn_flag_modify_flags;
1086 int const n_res = 1;
1089 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1090 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1091 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1092 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1093 out_infos[0].req = &arm_class_reg_req_flags;
1099 ir_node *new_bd_arm_Cmn_reg_shift_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
ir_node *right, arm_shift_modifier_t shift_modifier,
unsigned shift_immediate,
bool ins_permuted,
bool is_unsigned)
1101 static arch_register_req_t
const *in_reqs[] = {
1102 &arm_class_reg_req_gp,
1103 &arm_class_reg_req_gp,
1113 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 2, in);
1116 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1117 irn_flags |= arch_irn_flag_rematerializable;
1118 irn_flags |= arch_irn_flag_modify_flags;
1121 int const n_res = 1;
1124 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1125 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1126 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1127 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1128 out_infos[0].req = &arm_class_reg_req_flags;
1136 static arch_register_req_t
const *in_reqs[] = {
1137 &arm_class_reg_req_gp,
1138 &arm_class_reg_req_gp,
1139 &arm_class_reg_req_gp,
1150 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 3, in);
1153 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1154 irn_flags |= arch_irn_flag_rematerializable;
1155 irn_flags |= arch_irn_flag_modify_flags;
1158 int const n_res = 1;
1161 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1162 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1163 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1164 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1165 out_infos[0].req = &arm_class_reg_req_flags;
1171 ir_node *new_bd_arm_Cmp_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
unsigned char immediate_value,
unsigned char immediate_rot,
bool ins_permuted,
bool is_unsigned)
1173 static arch_register_req_t
const *in_reqs[] = {
1174 &arm_class_reg_req_gp,
1183 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 1, in);
1186 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1187 irn_flags |= arch_irn_flag_rematerializable;
1188 irn_flags |= arch_irn_flag_modify_flags;
1191 int const n_res = 1;
1194 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1195 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1196 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1197 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1198 out_infos[0].req = &arm_class_reg_req_flags;
1206 static arch_register_req_t
const *in_reqs[] = {
1207 &arm_class_reg_req_gp,
1208 &arm_class_reg_req_gp,
1218 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 2, in);
1221 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1222 irn_flags |= arch_irn_flag_rematerializable;
1223 irn_flags |= arch_irn_flag_modify_flags;
1226 int const n_res = 1;
1229 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1230 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1231 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1232 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1233 out_infos[0].req = &arm_class_reg_req_flags;
1239 ir_node *new_bd_arm_Cmp_reg_shift_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
ir_node *right, arm_shift_modifier_t shift_modifier,
unsigned shift_immediate,
bool ins_permuted,
bool is_unsigned)
1241 static arch_register_req_t
const *in_reqs[] = {
1242 &arm_class_reg_req_gp,
1243 &arm_class_reg_req_gp,
1253 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 2, in);
1256 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1257 irn_flags |= arch_irn_flag_rematerializable;
1258 irn_flags |= arch_irn_flag_modify_flags;
1261 int const n_res = 1;
1264 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1265 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1266 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1267 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1268 out_infos[0].req = &arm_class_reg_req_flags;
1276 static arch_register_req_t
const *in_reqs[] = {
1277 &arm_class_reg_req_gp,
1278 &arm_class_reg_req_gp,
1279 &arm_class_reg_req_gp,
1290 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 3, in);
1293 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1294 irn_flags |= arch_irn_flag_rematerializable;
1295 irn_flags |= arch_irn_flag_modify_flags;
1298 int const n_res = 1;
1301 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1302 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1303 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1304 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1305 out_infos[0].req = &arm_class_reg_req_flags;
1313 static arch_register_req_t
const *in_reqs[] = {
1314 &arm_class_reg_req_fpa,
1315 &arm_class_reg_req_fpa,
1328 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1331 int const n_res = 2;
1334 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1335 init_arm_farith_attributes(res, op_mode);
1336 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1337 out_infos[0].req = &arm_class_reg_req_fpa;
1338 out_infos[1].req = &arch_memory_requirement;
1346 static arch_register_req_t
const *in_reqs[] = {
1347 &arm_class_reg_req_gp,
1359 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1360 irn_flags |= arch_irn_flag_rematerializable;
1363 int const n_res = 1;
1366 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1367 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1368 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1369 out_infos[0].req = &arm_class_reg_req_gp;
1377 static arch_register_req_t
const *in_reqs[] = {
1378 &arm_class_reg_req_gp,
1379 &arm_class_reg_req_gp,
1392 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1393 irn_flags |= arch_irn_flag_rematerializable;
1396 int const n_res = 1;
1399 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1400 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1401 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1402 out_infos[0].req = &arm_class_reg_req_gp;
1410 static arch_register_req_t
const *in_reqs[] = {
1411 &arm_class_reg_req_gp,
1412 &arm_class_reg_req_gp,
1425 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1426 irn_flags |= arch_irn_flag_rematerializable;
1429 int const n_res = 1;
1432 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1433 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1434 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1435 out_infos[0].req = &arm_class_reg_req_gp;
1443 static arch_register_req_t
const *in_reqs[] = {
1444 &arm_class_reg_req_gp,
1445 &arm_class_reg_req_gp,
1446 &arm_class_reg_req_gp,
1460 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1461 irn_flags |= arch_irn_flag_rematerializable;
1464 int const n_res = 1;
1467 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1468 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1469 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1470 out_infos[0].req = &arm_class_reg_req_gp;
1478 static arch_register_req_t
const *in_reqs[] = {
1479 &arm_class_reg_req_gp,
1491 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1492 irn_flags |= arch_irn_flag_rematerializable;
1495 int const n_res = 1;
1498 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1499 init_arm_farith_attributes(res, op_mode);
1500 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1501 out_infos[0].req = &arm_class_reg_req_fpa;
1509 static arch_register_req_t
const *in_reqs[] = {
1510 &arm_class_reg_req_gp,
1519 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_FrameAddr, arm_mode_gp, 1, in);
1522 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1523 irn_flags |= arch_irn_flag_rematerializable;
1526 int const n_res = 1;
1529 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1530 init_arm_Address_attributes(res, entity, offset);
1531 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1532 out_infos[0].req = &arm_class_reg_req_gp;
1540 static arch_register_req_t
const *in_reqs[] = {
1541 &arm_class_reg_req_gp,
1553 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1556 int const n_res = 1;
1559 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1560 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1561 out_infos[0].req = &arch_exec_requirement;
1569 static arch_register_req_t
const *in_reqs[] = {
1570 &arm_class_reg_req_gp,
1571 &arch_memory_requirement,
1584 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1587 int const n_res = 2;
1590 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1591 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1592 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1593 out_infos[0].req = &arm_class_reg_req_fpa;
1594 out_infos[1].req = &arch_memory_requirement;
1602 static arch_register_req_t
const *in_reqs[] = {
1603 &arm_class_reg_req_gp,
1604 &arch_memory_requirement,
1617 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1620 int const n_res = 2;
1623 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1624 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1625 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1626 out_infos[0].req = &arm_class_reg_req_gp;
1627 out_infos[1].req = &arch_memory_requirement;
1633 ir_node *new_bd_arm_LinkLdrPC(
dbg_info *dbgi,
ir_node *block,
int const arity,
ir_node *
const *
const in, arch_register_req_t
const **
const in_reqs,
int n_res,
ir_mode *ls_mode,
ir_entity *entity,
int entity_sign,
long offset,
bool is_frame_entity)
1641 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1642 irn_flags |= arch_irn_flag_modify_flags;
1647 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1648 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1654 ir_node *new_bd_arm_LinkMovPC(
dbg_info *dbgi,
ir_node *block,
int const arity,
ir_node *
const *
const in, arch_register_req_t
const **
const in_reqs,
int n_res,
unsigned shiftop_input, arm_shift_modifier_t shift_modifier,
unsigned char immediate_value,
unsigned char immediate_rot)
1662 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1663 irn_flags |= arch_irn_flag_modify_flags;
1668 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1669 init_arm_shifter_operand(res, shiftop_input, immediate_value, shift_modifier, immediate_rot);
1678 static arch_register_req_t
const *in_reqs[] = {
1679 &arm_class_reg_req_gp,
1680 &arm_class_reg_req_gp,
1681 &arm_class_reg_req_gp,
1695 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1696 irn_flags |= arch_irn_flag_rematerializable;
1699 int const n_res = 1;
1702 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1703 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1704 out_infos[0].req = &arm_class_reg_req_gp;
1712 static arch_register_req_t
const *in_reqs[] = {
1713 &arm_class_reg_req_gp,
1714 &arm_class_reg_req_gp,
1715 &arm_class_reg_req_gp,
1729 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1730 irn_flags |= arch_irn_flag_rematerializable;
1733 int const n_res = 1;
1736 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1737 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1738 out_infos[0].req = &arm_requirements_gp_not_in_r0;
1746 static arch_register_req_t
const *in_reqs[] = {
1747 &arm_class_reg_req_gp,
1748 &arm_class_reg_req_gp,
1749 &arm_class_reg_req_gp,
1763 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1764 irn_flags |= arch_irn_flag_rematerializable;
1767 int const n_res = 1;
1770 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1771 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1772 out_infos[0].req = &arm_class_reg_req_gp;
1778 ir_node *new_bd_arm_Mov_imm(
dbg_info *dbgi,
ir_node *block,
unsigned char immediate_value,
unsigned char immediate_rot)
1780 static arch_register_req_t
const *in_reqs[] = {
1785 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Mov, arm_mode_gp, 0, NULL);
1788 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1789 irn_flags |= arch_irn_flag_rematerializable;
1792 int const n_res = 1;
1795 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1796 init_arm_shifter_operand(res, 0, immediate_value, ARM_SHF_IMM, immediate_rot);
1797 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1798 out_infos[0].req = &arm_class_reg_req_gp;
1806 static arch_register_req_t
const *in_reqs[] = {
1807 &arm_class_reg_req_gp,
1819 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1820 irn_flags |= arch_irn_flag_rematerializable;
1823 int const n_res = 1;
1826 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1827 init_arm_shifter_operand(res, 0, 0, ARM_SHF_REG, 0);
1828 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1829 out_infos[0].req = &arm_class_reg_req_gp;
1835 ir_node *new_bd_arm_Mov_reg_shift_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *Rm, arm_shift_modifier_t shift_modifier,
unsigned shift_immediate)
1837 static arch_register_req_t
const *in_reqs[] = {
1838 &arm_class_reg_req_gp,
1850 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1851 irn_flags |= arch_irn_flag_rematerializable;
1854 int const n_res = 1;
1857 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1858 init_arm_shifter_operand(res, 0, 0, shift_modifier, shift_immediate);
1859 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1860 out_infos[0].req = &arm_class_reg_req_gp;
1868 static arch_register_req_t
const *in_reqs[] = {
1869 &arm_class_reg_req_gp,
1870 &arm_class_reg_req_gp,
1883 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1884 irn_flags |= arch_irn_flag_rematerializable;
1887 int const n_res = 1;
1890 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1891 init_arm_shifter_operand(res, 0, 0, shift_modifier, 0);
1892 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1893 out_infos[0].req = &arm_class_reg_req_gp;
1901 static arch_register_req_t
const *in_reqs[] = {
1902 &arm_class_reg_req_fpa,
1903 &arm_class_reg_req_fpa,
1916 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1917 irn_flags |= arch_irn_flag_rematerializable;
1920 int const n_res = 1;
1923 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1924 init_arm_farith_attributes(res, op_mode);
1925 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1926 out_infos[0].req = &arm_class_reg_req_fpa;
1934 static arch_register_req_t
const *in_reqs[] = {
1935 &arm_class_reg_req_gp,
1936 &arm_class_reg_req_gp,
1949 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1950 irn_flags |= arch_irn_flag_rematerializable;
1953 int const n_res = 1;
1956 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1957 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1958 out_infos[0].req = &arm_class_reg_req_gp;
1966 static arch_register_req_t
const *in_reqs[] = {
1967 &arm_class_reg_req_gp,
1968 &arm_class_reg_req_gp,
1981 arch_irn_flags_t irn_flags = arch_irn_flags_none;
1982 irn_flags |= arch_irn_flag_rematerializable;
1985 int const n_res = 1;
1988 init_arm_attributes(res, irn_flags, in_reqs, n_res);
1989 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
1990 out_infos[0].req = &arm_requirements_gp_not_in_r0;
1998 static arch_register_req_t
const *in_reqs[] = {
1999 &arm_class_reg_req_fpa,
2011 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2012 irn_flags |= arch_irn_flag_rematerializable;
2015 int const n_res = 1;
2018 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2019 init_arm_farith_attributes(res, op_mode);
2020 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2021 out_infos[0].req = &arm_class_reg_req_fpa;
2027 ir_node *new_bd_arm_Mvn_imm(
dbg_info *dbgi,
ir_node *block,
unsigned char immediate_value,
unsigned char immediate_rot)
2029 static arch_register_req_t
const *in_reqs[] = {
2034 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Mvn, arm_mode_gp, 0, NULL);
2037 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2038 irn_flags |= arch_irn_flag_rematerializable;
2041 int const n_res = 1;
2044 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2045 init_arm_shifter_operand(res, 0, immediate_value, ARM_SHF_IMM, immediate_rot);
2046 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2047 out_infos[0].req = &arm_class_reg_req_gp;
2055 static arch_register_req_t
const *in_reqs[] = {
2056 &arm_class_reg_req_gp,
2068 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2069 irn_flags |= arch_irn_flag_rematerializable;
2072 int const n_res = 1;
2075 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2076 init_arm_shifter_operand(res, 0, 0, ARM_SHF_REG, 0);
2077 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2078 out_infos[0].req = &arm_class_reg_req_gp;
2084 ir_node *new_bd_arm_Mvn_reg_shift_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *Rm, arm_shift_modifier_t shift_modifier,
unsigned shift_immediate)
2086 static arch_register_req_t
const *in_reqs[] = {
2087 &arm_class_reg_req_gp,
2099 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2100 irn_flags |= arch_irn_flag_rematerializable;
2103 int const n_res = 1;
2106 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2107 init_arm_shifter_operand(res, 0, 0, shift_modifier, shift_immediate);
2108 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2109 out_infos[0].req = &arm_class_reg_req_gp;
2117 static arch_register_req_t
const *in_reqs[] = {
2118 &arm_class_reg_req_gp,
2119 &arm_class_reg_req_gp,
2132 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2133 irn_flags |= arch_irn_flag_rematerializable;
2136 int const n_res = 1;
2139 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2140 init_arm_shifter_operand(res, 0, 0, shift_modifier, 0);
2141 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2142 out_infos[0].req = &arm_class_reg_req_gp;
2163 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2166 int const n_res = 0;
2167 (void)irn_flags, (
void)n_res;
2175 static arch_register_req_t
const *in_reqs[] = {
2176 &arm_class_reg_req_gp,
2188 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2189 irn_flags |= arch_irn_flag_rematerializable;
2192 int const n_res = 1;
2195 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2196 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2197 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2198 out_infos[0].req = &arm_class_reg_req_gp;
2206 static arch_register_req_t
const *in_reqs[] = {
2207 &arm_class_reg_req_gp,
2208 &arm_class_reg_req_gp,
2221 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2222 irn_flags |= arch_irn_flag_rematerializable;
2225 int const n_res = 1;
2228 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2229 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2230 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2231 out_infos[0].req = &arm_class_reg_req_gp;
2239 static arch_register_req_t
const *in_reqs[] = {
2240 &arm_class_reg_req_gp,
2241 &arm_class_reg_req_gp,
2254 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2255 irn_flags |= arch_irn_flag_rematerializable;
2258 int const n_res = 1;
2261 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2262 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2263 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2264 out_infos[0].req = &arm_class_reg_req_gp;
2272 static arch_register_req_t
const *in_reqs[] = {
2273 &arm_class_reg_req_gp,
2274 &arm_class_reg_req_gp,
2275 &arm_class_reg_req_gp,
2289 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2290 irn_flags |= arch_irn_flag_rematerializable;
2293 int const n_res = 1;
2296 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2297 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2298 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2299 out_infos[0].req = &arm_class_reg_req_gp;
2307 static arch_register_req_t
const *in_reqs[] = {
2308 &arm_class_reg_req_gp,
2309 &arm_class_reg_req_flags,
2310 &arm_class_reg_req_gp,
2311 &arm_class_reg_req_gp,
2323 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_OrrPl, arm_mode_gp, 4, in);
2326 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2329 int const n_res = 1;
2332 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2333 init_arm_shifter_operand(res, 3, 0, ARM_SHF_REG, 0);
2334 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2335 out_infos[0].req = &arm_requirements_gp_in_r2;
2343 static arch_register_req_t
const *in_reqs[] = {
2344 &arm_class_reg_req_gp,
2353 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 1, in);
2356 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2357 irn_flags |= arch_irn_flag_rematerializable;
2360 int const n_res = 1;
2363 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2364 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2365 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2366 out_infos[0].req = &arm_class_reg_req_gp;
2374 static arch_register_req_t
const *in_reqs[] = {
2375 &arm_class_reg_req_gp,
2376 &arm_class_reg_req_gp,
2386 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 2, in);
2389 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2390 irn_flags |= arch_irn_flag_rematerializable;
2393 int const n_res = 1;
2396 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2397 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2398 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2399 out_infos[0].req = &arm_class_reg_req_gp;
2407 static arch_register_req_t
const *in_reqs[] = {
2408 &arm_class_reg_req_gp,
2409 &arm_class_reg_req_gp,
2419 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 2, in);
2422 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2423 irn_flags |= arch_irn_flag_rematerializable;
2426 int const n_res = 1;
2429 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2430 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2431 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2432 out_infos[0].req = &arm_class_reg_req_gp;
2440 static arch_register_req_t
const *in_reqs[] = {
2441 &arm_class_reg_req_gp,
2442 &arm_class_reg_req_gp,
2443 &arm_class_reg_req_gp,
2454 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 3, in);
2457 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2458 irn_flags |= arch_irn_flag_rematerializable;
2461 int const n_res = 1;
2464 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2465 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2466 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2467 out_infos[0].req = &arm_class_reg_req_gp;
2475 static arch_register_req_t
const *in_reqs[] = {
2476 &arm_class_reg_req_gp,
2485 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 1, in);
2488 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2489 irn_flags |= arch_irn_flag_rematerializable;
2492 int const n_res = 1;
2495 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2496 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2497 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2498 out_infos[0].req = &arm_class_reg_req_gp;
2506 static arch_register_req_t
const *in_reqs[] = {
2507 &arm_class_reg_req_gp,
2508 &arm_class_reg_req_gp,
2518 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 2, in);
2521 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2522 irn_flags |= arch_irn_flag_rematerializable;
2525 int const n_res = 1;
2528 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2529 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2530 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2531 out_infos[0].req = &arm_class_reg_req_gp;
2539 static arch_register_req_t
const *in_reqs[] = {
2540 &arm_class_reg_req_gp,
2541 &arm_class_reg_req_gp,
2551 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 2, in);
2554 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2555 irn_flags |= arch_irn_flag_rematerializable;
2558 int const n_res = 1;
2561 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2562 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2563 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2564 out_infos[0].req = &arm_class_reg_req_gp;
2572 static arch_register_req_t
const *in_reqs[] = {
2573 &arm_class_reg_req_gp,
2574 &arm_class_reg_req_gp,
2575 &arm_class_reg_req_gp,
2586 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 3, in);
2589 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2590 irn_flags |= arch_irn_flag_rematerializable;
2593 int const n_res = 1;
2596 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2597 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2598 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2599 out_infos[0].req = &arm_class_reg_req_gp;
2605 ir_node *new_bd_arm_Return(
dbg_info *dbgi,
ir_node *block,
int const arity,
ir_node *
const *
const in, arch_register_req_t
const **
const in_reqs)
2613 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2616 int const n_res = 1;
2619 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2620 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2621 out_infos[0].req = &arch_exec_requirement;
2629 static arch_register_req_t
const *in_reqs[] = {
2630 &arm_class_reg_req_gp,
2631 &arm_class_reg_req_flags,
2644 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2647 int const n_res = 1;
2650 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2651 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2652 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2653 out_infos[0].req = &arm_class_reg_req_gp;
2661 static arch_register_req_t
const *in_reqs[] = {
2662 &arm_class_reg_req_gp,
2663 &arm_class_reg_req_gp,
2664 &arm_class_reg_req_flags,
2678 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2681 int const n_res = 1;
2684 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2685 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2686 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2687 out_infos[0].req = &arm_class_reg_req_gp;
2695 static arch_register_req_t
const *in_reqs[] = {
2696 &arm_class_reg_req_gp,
2697 &arm_class_reg_req_gp,
2698 &arm_class_reg_req_flags,
2712 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2715 int const n_res = 1;
2718 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2719 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2720 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2721 out_infos[0].req = &arm_class_reg_req_gp;
2729 static arch_register_req_t
const *in_reqs[] = {
2730 &arm_class_reg_req_gp,
2731 &arm_class_reg_req_gp,
2732 &arm_class_reg_req_gp,
2733 &arm_class_reg_req_flags,
2748 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2751 int const n_res = 1;
2754 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2755 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2756 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2757 out_infos[0].req = &arm_class_reg_req_gp;
2765 static arch_register_req_t
const *in_reqs[] = {
2766 &arm_class_reg_req_gp,
2778 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2779 irn_flags |= arch_irn_flag_rematerializable;
2782 int const n_res = 1;
2785 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2786 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2787 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2788 out_infos[0].req = &arm_class_reg_req_gp;
2796 static arch_register_req_t
const *in_reqs[] = {
2797 &arm_class_reg_req_gp,
2798 &arm_class_reg_req_gp,
2811 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2812 irn_flags |= arch_irn_flag_rematerializable;
2815 int const n_res = 1;
2818 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2819 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2820 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2821 out_infos[0].req = &arm_class_reg_req_gp;
2829 static arch_register_req_t
const *in_reqs[] = {
2830 &arm_class_reg_req_gp,
2831 &arm_class_reg_req_gp,
2844 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2845 irn_flags |= arch_irn_flag_rematerializable;
2848 int const n_res = 1;
2851 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2852 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2853 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2854 out_infos[0].req = &arm_class_reg_req_gp;
2862 static arch_register_req_t
const *in_reqs[] = {
2863 &arm_class_reg_req_gp,
2864 &arm_class_reg_req_gp,
2865 &arm_class_reg_req_gp,
2879 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2880 irn_flags |= arch_irn_flag_rematerializable;
2883 int const n_res = 1;
2886 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2887 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2888 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2889 out_infos[0].req = &arm_class_reg_req_gp;
2897 static arch_register_req_t
const *in_reqs[] = {
2898 &arm_class_reg_req_gp,
2910 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2911 irn_flags |= arch_irn_flag_modify_flags;
2912 irn_flags |= arch_irn_flag_rematerializable;
2915 int const n_res = 2;
2918 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2919 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2920 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2921 out_infos[0].req = &arm_class_reg_req_gp;
2922 out_infos[1].req = &arm_class_reg_req_flags;
2930 static arch_register_req_t
const *in_reqs[] = {
2931 &arm_class_reg_req_gp,
2932 &arm_class_reg_req_gp,
2945 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2946 irn_flags |= arch_irn_flag_modify_flags;
2947 irn_flags |= arch_irn_flag_rematerializable;
2950 int const n_res = 2;
2953 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2954 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2955 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2956 out_infos[0].req = &arm_class_reg_req_gp;
2957 out_infos[1].req = &arm_class_reg_req_flags;
2965 static arch_register_req_t
const *in_reqs[] = {
2966 &arm_class_reg_req_gp,
2967 &arm_class_reg_req_gp,
2980 arch_irn_flags_t irn_flags = arch_irn_flags_none;
2981 irn_flags |= arch_irn_flag_modify_flags;
2982 irn_flags |= arch_irn_flag_rematerializable;
2985 int const n_res = 2;
2988 init_arm_attributes(res, irn_flags, in_reqs, n_res);
2989 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2990 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
2991 out_infos[0].req = &arm_class_reg_req_gp;
2992 out_infos[1].req = &arm_class_reg_req_flags;
3000 static arch_register_req_t
const *in_reqs[] = {
3001 &arm_class_reg_req_gp,
3002 &arm_class_reg_req_gp,
3003 &arm_class_reg_req_gp,
3017 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3018 irn_flags |= arch_irn_flag_modify_flags;
3019 irn_flags |= arch_irn_flag_rematerializable;
3022 int const n_res = 2;
3025 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3026 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3027 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3028 out_infos[0].req = &arm_class_reg_req_gp;
3029 out_infos[1].req = &arm_class_reg_req_flags;
3037 static arch_register_req_t
const *in_reqs[] = {
3038 &arm_class_reg_req_gp,
3039 &arm_class_reg_req_gp,
3052 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3053 irn_flags |= arch_irn_flag_rematerializable;
3056 int const n_res = 2;
3059 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3060 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3061 out_infos[0].req = &arm_class_reg_req_gp;
3062 out_infos[1].req = &arm_class_reg_req_gp;
3081 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3084 int const n_res = 2;
3085 (void)irn_flags, (
void)n_res;
3093 static arch_register_req_t
const *in_reqs[] = {
3094 &arm_class_reg_req_gp,
3095 &arm_class_reg_req_flags,
3108 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3111 int const n_res = 1;
3114 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3115 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3116 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3117 out_infos[0].req = &arm_class_reg_req_gp;
3125 static arch_register_req_t
const *in_reqs[] = {
3126 &arm_class_reg_req_gp,
3127 &arm_class_reg_req_gp,
3128 &arm_class_reg_req_flags,
3142 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3145 int const n_res = 1;
3148 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3149 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3150 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3151 out_infos[0].req = &arm_class_reg_req_gp;
3159 static arch_register_req_t
const *in_reqs[] = {
3160 &arm_class_reg_req_gp,
3161 &arm_class_reg_req_gp,
3162 &arm_class_reg_req_flags,
3176 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3179 int const n_res = 1;
3182 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3183 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3184 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3185 out_infos[0].req = &arm_class_reg_req_gp;
3193 static arch_register_req_t
const *in_reqs[] = {
3194 &arm_class_reg_req_gp,
3195 &arm_class_reg_req_gp,
3196 &arm_class_reg_req_gp,
3197 &arm_class_reg_req_flags,
3212 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3215 int const n_res = 1;
3218 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3219 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3220 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3221 out_infos[0].req = &arm_class_reg_req_gp;
3241 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3244 int const n_res = 0;
3245 (void)irn_flags, (
void)n_res;
3253 static arch_register_req_t
const *in_reqs[] = {
3254 &arm_class_reg_req_gp,
3255 &arm_class_reg_req_fpa,
3256 &arch_memory_requirement,
3270 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3273 int const n_res = 1;
3276 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3277 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
3278 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3279 out_infos[0].req = &arch_memory_requirement;
3287 static arch_register_req_t
const *in_reqs[] = {
3288 &arm_class_reg_req_gp,
3289 &arm_class_reg_req_gp,
3290 &arch_memory_requirement,
3304 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3307 int const n_res = 1;
3310 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3311 init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
3312 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3313 out_infos[0].req = &arch_memory_requirement;
3321 static arch_register_req_t
const *in_reqs[] = {
3322 &arm_class_reg_req_gp,
3334 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3335 irn_flags |= arch_irn_flag_rematerializable;
3338 int const n_res = 1;
3341 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3342 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3343 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3344 out_infos[0].req = &arm_class_reg_req_gp;
3352 static arch_register_req_t
const *in_reqs[] = {
3353 &arm_class_reg_req_gp,
3354 &arm_class_reg_req_gp,
3367 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3368 irn_flags |= arch_irn_flag_rematerializable;
3371 int const n_res = 1;
3374 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3375 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3376 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3377 out_infos[0].req = &arm_class_reg_req_gp;
3385 static arch_register_req_t
const *in_reqs[] = {
3386 &arm_class_reg_req_gp,
3387 &arm_class_reg_req_gp,
3400 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3401 irn_flags |= arch_irn_flag_rematerializable;
3404 int const n_res = 1;
3407 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3408 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3409 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3410 out_infos[0].req = &arm_class_reg_req_gp;
3418 static arch_register_req_t
const *in_reqs[] = {
3419 &arm_class_reg_req_gp,
3420 &arm_class_reg_req_gp,
3421 &arm_class_reg_req_gp,
3435 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3436 irn_flags |= arch_irn_flag_rematerializable;
3439 int const n_res = 1;
3442 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3443 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3444 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3445 out_infos[0].req = &arm_class_reg_req_gp;
3453 static arch_register_req_t
const *in_reqs[] = {
3454 &arm_class_reg_req_gp,
3466 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3467 irn_flags |= arch_irn_flag_modify_flags;
3468 irn_flags |= arch_irn_flag_rematerializable;
3471 int const n_res = 2;
3474 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3475 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3476 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3477 out_infos[0].req = &arm_class_reg_req_gp;
3478 out_infos[1].req = &arm_class_reg_req_flags;
3486 static arch_register_req_t
const *in_reqs[] = {
3487 &arm_class_reg_req_gp,
3488 &arm_class_reg_req_gp,
3501 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3502 irn_flags |= arch_irn_flag_modify_flags;
3503 irn_flags |= arch_irn_flag_rematerializable;
3506 int const n_res = 2;
3509 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3510 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3511 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3512 out_infos[0].req = &arm_class_reg_req_gp;
3513 out_infos[1].req = &arm_class_reg_req_flags;
3521 static arch_register_req_t
const *in_reqs[] = {
3522 &arm_class_reg_req_gp,
3523 &arm_class_reg_req_gp,
3536 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3537 irn_flags |= arch_irn_flag_modify_flags;
3538 irn_flags |= arch_irn_flag_rematerializable;
3541 int const n_res = 2;
3544 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3545 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3546 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3547 out_infos[0].req = &arm_class_reg_req_gp;
3548 out_infos[1].req = &arm_class_reg_req_flags;
3556 static arch_register_req_t
const *in_reqs[] = {
3557 &arm_class_reg_req_gp,
3558 &arm_class_reg_req_gp,
3559 &arm_class_reg_req_gp,
3573 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3574 irn_flags |= arch_irn_flag_modify_flags;
3575 irn_flags |= arch_irn_flag_rematerializable;
3578 int const n_res = 2;
3581 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3582 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3583 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3584 out_infos[0].req = &arm_class_reg_req_gp;
3585 out_infos[1].req = &arm_class_reg_req_flags;
3604 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3607 int const n_res = 2;
3608 (void)irn_flags, (
void)n_res;
3616 static arch_register_req_t
const *in_reqs[] = {
3617 &arm_class_reg_req_fpa,
3618 &arm_class_reg_req_fpa,
3631 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3632 irn_flags |= arch_irn_flag_rematerializable;
3635 int const n_res = 1;
3638 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3639 init_arm_farith_attributes(res, op_mode);
3640 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3641 out_infos[0].req = &arm_class_reg_req_fpa;
3649 static arch_register_req_t
const *in_reqs[] = {
3650 &arm_class_reg_req_gp,
3662 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3667 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3668 be_switch_attr_init(res, &attr->swtch, table, NULL);
3674 ir_node *new_bd_arm_Tst_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
unsigned char immediate_value,
unsigned char immediate_rot,
bool ins_permuted,
bool is_unsigned)
3676 static arch_register_req_t
const *in_reqs[] = {
3677 &arm_class_reg_req_gp,
3686 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 1, in);
3689 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3690 irn_flags |= arch_irn_flag_rematerializable;
3691 irn_flags |= arch_irn_flag_modify_flags;
3694 int const n_res = 1;
3697 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3698 init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3699 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3700 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3701 out_infos[0].req = &arm_class_reg_req_flags;
3709 static arch_register_req_t
const *in_reqs[] = {
3710 &arm_class_reg_req_gp,
3711 &arm_class_reg_req_gp,
3721 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 2, in);
3724 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3725 irn_flags |= arch_irn_flag_rematerializable;
3726 irn_flags |= arch_irn_flag_modify_flags;
3729 int const n_res = 1;
3732 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3733 init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3734 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3735 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3736 out_infos[0].req = &arm_class_reg_req_flags;
3742 ir_node *new_bd_arm_Tst_reg_shift_imm(
dbg_info *dbgi,
ir_node *block,
ir_node *left,
ir_node *right, arm_shift_modifier_t shift_modifier,
unsigned shift_immediate,
bool ins_permuted,
bool is_unsigned)
3744 static arch_register_req_t
const *in_reqs[] = {
3745 &arm_class_reg_req_gp,
3746 &arm_class_reg_req_gp,
3756 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 2, in);
3759 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3760 irn_flags |= arch_irn_flag_rematerializable;
3761 irn_flags |= arch_irn_flag_modify_flags;
3764 int const n_res = 1;
3767 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3768 init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3769 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3770 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3771 out_infos[0].req = &arm_class_reg_req_flags;
3779 static arch_register_req_t
const *in_reqs[] = {
3780 &arm_class_reg_req_gp,
3781 &arm_class_reg_req_gp,
3782 &arm_class_reg_req_gp,
3793 ir_node *
const res =
new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 3, in);
3796 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3797 irn_flags |= arch_irn_flag_rematerializable;
3798 irn_flags |= arch_irn_flag_modify_flags;
3801 int const n_res = 1;
3804 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3805 init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3806 init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3807 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3808 out_infos[0].req = &arm_class_reg_req_flags;
3816 static arch_register_req_t
const *in_reqs[] = {
3817 &arm_class_reg_req_gp,
3818 &arm_class_reg_req_gp,
3831 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3832 irn_flags |= arch_irn_flag_rematerializable;
3835 int const n_res = 2;
3838 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3839 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3840 out_infos[0].req = &arm_class_reg_req_gp;
3841 out_infos[1].req = &arm_class_reg_req_gp;
3860 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3863 int const n_res = 2;
3864 (void)irn_flags, (
void)n_res;
3872 arch_register_req_t
const **
const in_reqs = NULL;
3879 arch_irn_flags_t irn_flags = arch_irn_flags_none;
3880 irn_flags |= arch_irn_flag_rematerializable;
3883 int const n_res = 1;
3886 init_arm_attributes(res, irn_flags, in_reqs, n_res);
3888 reg_out_info_t *
const out_infos = be_get_info(res)->out_infos;
3889 out_infos[0].req = &arm_class_reg_req_fpa;
3900 void arm_create_opcodes(
void)
3905 arm_opcode_start = cur_opcode;
3910 set_op_tag(op, arm_op_tag);
3914 set_op_tag(op, arm_op_tag);
3920 set_op_tag(op, arm_op_tag);
3926 set_op_tag(op, arm_op_tag);
3930 set_op_tag(op, arm_op_tag);
3936 set_op_tag(op, arm_op_tag);
3937 op_arm_Address = op;
3942 set_op_tag(op, arm_op_tag);
3948 set_op_tag(op, arm_op_tag);
3954 set_op_tag(op, arm_op_tag);
3960 set_op_tag(op, arm_op_tag);
3966 set_op_tag(op, arm_op_tag);
3972 set_op_tag(op, arm_op_tag);
3978 set_op_tag(op, arm_op_tag);
3984 set_op_tag(op, arm_op_tag);
3990 set_op_tag(op, arm_op_tag);
3996 set_op_tag(op, arm_op_tag);
4002 set_op_tag(op, arm_op_tag);
4008 set_op_tag(op, arm_op_tag);
4014 set_op_tag(op, arm_op_tag);
4020 set_op_tag(op, arm_op_tag);
4021 op_arm_FrameAddr = op;
4026 set_op_tag(op, arm_op_tag);
4032 set_op_tag(op, arm_op_tag);
4038 set_op_tag(op, arm_op_tag);
4044 set_op_tag(op, arm_op_tag);
4045 op_arm_LinkLdrPC = op;
4050 set_op_tag(op, arm_op_tag);
4051 op_arm_LinkMovPC = op;
4056 set_op_tag(op, arm_op_tag);
4062 set_op_tag(op, arm_op_tag);
4068 set_op_tag(op, arm_op_tag);
4074 set_op_tag(op, arm_op_tag);
4080 set_op_tag(op, arm_op_tag);
4086 set_op_tag(op, arm_op_tag);
4092 set_op_tag(op, arm_op_tag);
4096 set_op_tag(op, arm_op_tag);
4102 set_op_tag(op, arm_op_tag);
4108 set_op_tag(op, arm_op_tag);
4114 set_op_tag(op, arm_op_tag);
4120 set_op_tag(op, arm_op_tag);
4126 set_op_tag(op, arm_op_tag);
4132 set_op_tag(op, arm_op_tag);
4138 set_op_tag(op, arm_op_tag);
4144 set_op_tag(op, arm_op_tag);
4150 set_op_tag(op, arm_op_tag);
4154 set_op_tag(op, arm_op_tag);
4155 op_arm_SMulL_t = op;
4160 set_op_tag(op, arm_op_tag);
4164 set_op_tag(op, arm_op_tag);
4170 set_op_tag(op, arm_op_tag);
4176 set_op_tag(op, arm_op_tag);
4182 set_op_tag(op, arm_op_tag);
4188 set_op_tag(op, arm_op_tag);
4192 set_op_tag(op, arm_op_tag);
4198 set_op_tag(op, arm_op_tag);
4204 set_op_tag(op, arm_op_tag);
4205 op_arm_SwitchJmp = op;
4210 set_op_tag(op, arm_op_tag);
4216 set_op_tag(op, arm_op_tag);
4220 set_op_tag(op, arm_op_tag);
4221 op_arm_UMulL_t = op;
4226 set_op_tag(op, arm_op_tag);
4231 void arm_free_opcodes(
void)
4234 free_ir_op(op_arm_AdC_t); op_arm_AdC_t = NULL;
4237 free_ir_op(op_arm_AddS_t); op_arm_AddS_t = NULL;
4238 free_ir_op(op_arm_Address); op_arm_Address = NULL;
4252 free_ir_op(op_arm_FrameAddr); op_arm_FrameAddr = NULL;
4256 free_ir_op(op_arm_LinkLdrPC); op_arm_LinkLdrPC = NULL;
4257 free_ir_op(op_arm_LinkMovPC); op_arm_LinkMovPC = NULL;
4265 free_ir_op(op_arm_OrPl_t); op_arm_OrPl_t = NULL;
4267 free_ir_op(op_arm_OrrPl); op_arm_OrrPl = NULL;
4268 free_ir_op(op_arm_Pkhbt); op_arm_Pkhbt = NULL;
4269 free_ir_op(op_arm_Pkhtb); op_arm_Pkhtb = NULL;
4270 free_ir_op(op_arm_Return); op_arm_Return = NULL;
4274 free_ir_op(op_arm_SMulL); op_arm_SMulL = NULL;
4275 free_ir_op(op_arm_SMulL_t); op_arm_SMulL_t = NULL;
4277 free_ir_op(op_arm_SbC_t); op_arm_SbC_t = NULL;
4282 free_ir_op(op_arm_SubS_t); op_arm_SubS_t = NULL;
4284 free_ir_op(op_arm_SwitchJmp); op_arm_SwitchJmp = NULL;
4286 free_ir_op(op_arm_UMulL); op_arm_UMulL = NULL;
4287 free_ir_op(op_arm_UMulL_t); op_arm_UMulL_t = NULL;
4288 free_ir_op(op_arm_fConst); op_arm_fConst = NULL;
unsigned get_irn_opcode(const ir_node *node)
Returns the opcode-enum of the node.
Forking control flow at this operation.
ir_graph * get_irn_irg(const ir_node *node)
Returns the ir_graph this node belongs to.
struct ir_op ir_op
Node Opcode.
void set_op_attrs_equal(ir_op *op, node_attrs_equal_func func)
Sets attrs_equal callback func for operation op.
void verify_new_node(ir_node *node)
If firm is built in debug mode, verify that a newly created node is fine.
struct dbg_info dbg_info
Source Reference.
void * get_irn_generic_attr(ir_node *node)
Returns a pointer to the node attributes.
struct ir_tarval ir_tarval
Target Machine Value.
ir_op * get_irn_op(const ir_node *node)
Returns the opcode struct of the node.
ir_node * optimize_node(ir_node *n)
Applies local optimizations to a single node.
ir_node * new_ir_node(dbg_info *db, ir_graph *irg, ir_node *block, ir_op *op, ir_mode *mode, int arity, ir_node *const *in)
IR node constructor.
This operation is a control flow operation.
struct ir_switch_table ir_switch_table
A switch table mapping integer numbers to proj-numbers of a Switch-node.
ir_mode * mode_T
tuple (none)
Nodes must remain in this basic block.
This operation has a memory input and may change the memory state.
Node must remain in this basic block if it can throw an exception, else can float.
void set_op_copy_attr(ir_op *op, copy_attr_func func)
Sets attribute copy callback func for operation op.
The arity is not fixed by opcode, but statically known.
ir_op * new_ir_op(unsigned code, const char *name, op_pin_state p, irop_flags flags, op_arity opar, int op_index, size_t attr_size)
Creates a new IR operation.
ir_relation
Relations for comparing numbers.
This operation has no arguments and is some kind of a constant.
struct ir_mode ir_mode
SSA Value mode.
unsigned get_next_ir_opcodes(unsigned num)
Returns the next free n IR opcode number, allows to register a bunch of user ops. ...
void set_op_dump(ir_op *op, dump_node_func func)
Sets dump callback func for operation op.
struct ir_entity ir_entity
Entity.
struct ir_node ir_node
Procedure Graph Node.
ir_mode * mode_F
ieee754 binary32 float (single precision)
void free_ir_op(ir_op *code)
Frees an ir operation.
struct ir_graph ir_graph
Procedure Graph.
ir_mode * mode_X
execution
Nodes of this opcode can be placed in any basic block.