libFirm
gen_arm_new_nodes.c
1 #include "gen_arm_new_nodes.h"
2 
3 #include "benode.h"
4 #include "arm_bearch_t.h"
5 #include "gen_arm_regalloc_if.h"
6 #include "arm_new_nodes_t.h"
7 #include "fourcc.h"
8 #include "irgopt.h"
9 #include "ircons_t.h"
10 
11 ir_op *op_arm_AdC = NULL;
12 ir_op *op_arm_AdC_t = NULL;
13 ir_op *op_arm_Add = NULL;
14 ir_op *op_arm_AddS = NULL;
15 ir_op *op_arm_AddS_t = NULL;
16 ir_op *op_arm_Address = NULL;
17 ir_op *op_arm_Adf = NULL;
18 ir_op *op_arm_And = NULL;
19 ir_op *op_arm_B = NULL;
20 ir_op *op_arm_Bcc = NULL;
21 ir_op *op_arm_Bic = NULL;
22 ir_op *op_arm_Bl = NULL;
23 ir_op *op_arm_Clz = NULL;
24 ir_op *op_arm_Cmfe = NULL;
25 ir_op *op_arm_Cmn = NULL;
26 ir_op *op_arm_Cmp = NULL;
27 ir_op *op_arm_Dvf = NULL;
28 ir_op *op_arm_Eor = NULL;
29 ir_op *op_arm_Flt = NULL;
30 ir_op *op_arm_FrameAddr = NULL;
31 ir_op *op_arm_IJmp = NULL;
32 ir_op *op_arm_Ldf = NULL;
33 ir_op *op_arm_Ldr = NULL;
34 ir_op *op_arm_LinkLdrPC = NULL;
35 ir_op *op_arm_LinkMovPC = NULL;
36 ir_op *op_arm_Mla = NULL;
37 ir_op *op_arm_Mls = NULL;
38 ir_op *op_arm_Mov = NULL;
39 ir_op *op_arm_Muf = NULL;
40 ir_op *op_arm_Mul = NULL;
41 ir_op *op_arm_Mvf = NULL;
42 ir_op *op_arm_Mvn = NULL;
43 ir_op *op_arm_OrPl_t = NULL;
44 ir_op *op_arm_Orr = NULL;
45 ir_op *op_arm_OrrPl = NULL;
46 ir_op *op_arm_Pkhbt = NULL;
47 ir_op *op_arm_Pkhtb = NULL;
48 ir_op *op_arm_Return = NULL;
49 ir_op *op_arm_RsC = NULL;
50 ir_op *op_arm_Rsb = NULL;
51 ir_op *op_arm_RsbS = NULL;
52 ir_op *op_arm_SMulL = NULL;
53 ir_op *op_arm_SMulL_t = NULL;
54 ir_op *op_arm_SbC = NULL;
55 ir_op *op_arm_SbC_t = NULL;
56 ir_op *op_arm_Stf = NULL;
57 ir_op *op_arm_Str = NULL;
58 ir_op *op_arm_Sub = NULL;
59 ir_op *op_arm_SubS = NULL;
60 ir_op *op_arm_SubS_t = NULL;
61 ir_op *op_arm_Suf = NULL;
62 ir_op *op_arm_SwitchJmp = NULL;
63 ir_op *op_arm_Tst = NULL;
64 ir_op *op_arm_UMulL = NULL;
65 ir_op *op_arm_UMulL_t = NULL;
66 ir_op *op_arm_fConst = NULL;
67 
68 
69 static int arm_opcode_start = -1;
70 
72 #define arm_op_tag FOURCC('a', 'r', 'm', '\0')
73 
75 int is_arm_op(const ir_op *op)
76 {
77  return get_op_tag(op) == arm_op_tag;
78 }
79 
81 int is_arm_irn(const ir_node *node)
82 {
83  return is_arm_op(get_irn_op(node));
84 }
85 
86 int get_arm_irn_opcode(const ir_node *node)
87 {
88  assert(is_arm_irn(node));
89  return get_irn_opcode(node) - arm_opcode_start;
90 }
91 
92 #undef BIT
93 #define BIT(x) (1 << (x))
94 
95 
96 static const arch_register_req_t arm_requirements_gp_not_in_r0 = {
97  .cls = &arm_reg_classes[CLASS_arm_gp],
98  .limited = NULL,
99  .should_be_same = 0,
100  .must_be_different = 1,
101  .width = 1,
102 };
103 
104 static const arch_register_req_t arm_requirements_gp_in_r2 = {
105  .cls = &arm_reg_classes[CLASS_arm_gp],
106  .limited = NULL,
107  .should_be_same = 4,
108  .must_be_different = 0,
109  .width = 1,
110 };
111 
112 
113 
114 ir_node *new_bd_arm_AdC_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *flags, unsigned char immediate_value, unsigned char immediate_rot)
115 {
116  static arch_register_req_t const *in_reqs[] = {
117  &arm_class_reg_req_gp,
118  &arm_class_reg_req_flags,
119  };
120 
121  /* construct in array */
122  ir_node *const in[] = {
123  left,
124  flags,
125  };
126 
127  ir_graph *const irg = get_irn_irg(block);
128  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AdC, arm_mode_gp, 2, in);
129 
130  /* flags */
131  arch_irn_flags_t irn_flags = arch_irn_flags_none;
132 
133  /* init node attributes */
134  int const n_res = 1;
135  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
136  (void)attr; /* avoid potential warning */
137  init_arm_attributes(res, irn_flags, in_reqs, n_res);
138  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
139  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
140  out_infos[0].req = &arm_class_reg_req_gp;
141 
142  verify_new_node(res);
143  return optimize_node(res);
144 }
145 
146 ir_node *new_bd_arm_AdC_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags)
147 {
148  static arch_register_req_t const *in_reqs[] = {
149  &arm_class_reg_req_gp,
150  &arm_class_reg_req_gp,
151  &arm_class_reg_req_flags,
152  };
153 
154  /* construct in array */
155  ir_node *const in[] = {
156  left,
157  right,
158  flags,
159  };
160 
161  ir_graph *const irg = get_irn_irg(block);
162  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AdC, arm_mode_gp, 3, in);
163 
164  /* flags */
165  arch_irn_flags_t irn_flags = arch_irn_flags_none;
166 
167  /* init node attributes */
168  int const n_res = 1;
169  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
170  (void)attr; /* avoid potential warning */
171  init_arm_attributes(res, irn_flags, in_reqs, n_res);
172  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
173  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
174  out_infos[0].req = &arm_class_reg_req_gp;
175 
176  verify_new_node(res);
177  return optimize_node(res);
178 }
179 
180 ir_node *new_bd_arm_AdC_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
181 {
182  static arch_register_req_t const *in_reqs[] = {
183  &arm_class_reg_req_gp,
184  &arm_class_reg_req_gp,
185  &arm_class_reg_req_flags,
186  };
187 
188  /* construct in array */
189  ir_node *const in[] = {
190  left,
191  right,
192  flags,
193  };
194 
195  ir_graph *const irg = get_irn_irg(block);
196  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AdC, arm_mode_gp, 3, in);
197 
198  /* flags */
199  arch_irn_flags_t irn_flags = arch_irn_flags_none;
200 
201  /* init node attributes */
202  int const n_res = 1;
203  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
204  (void)attr; /* avoid potential warning */
205  init_arm_attributes(res, irn_flags, in_reqs, n_res);
206  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
207  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
208  out_infos[0].req = &arm_class_reg_req_gp;
209 
210  verify_new_node(res);
211  return optimize_node(res);
212 }
213 
214 ir_node *new_bd_arm_AdC_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, ir_node *flags, arm_shift_modifier_t shift_modifier)
215 {
216  static arch_register_req_t const *in_reqs[] = {
217  &arm_class_reg_req_gp,
218  &arm_class_reg_req_gp,
219  &arm_class_reg_req_gp,
220  &arm_class_reg_req_flags,
221  };
222 
223  /* construct in array */
224  ir_node *const in[] = {
225  left,
226  right,
227  shift,
228  flags,
229  };
230 
231  ir_graph *const irg = get_irn_irg(block);
232  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AdC, arm_mode_gp, 4, in);
233 
234  /* flags */
235  arch_irn_flags_t irn_flags = arch_irn_flags_none;
236 
237  /* init node attributes */
238  int const n_res = 1;
239  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
240  (void)attr; /* avoid potential warning */
241  init_arm_attributes(res, irn_flags, in_reqs, n_res);
242  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
243  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
244  out_infos[0].req = &arm_class_reg_req_gp;
245 
246  verify_new_node(res);
247  return optimize_node(res);
248 }
249 
250 ir_node *new_bd_arm_AdC_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags, ir_mode *mode)
251 {
252 
253  /* construct in array */
254  ir_node *const in[] = {
255  left,
256  right,
257  flags,
258  };
259 
260  ir_graph *const irg = get_irn_irg(block);
261  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AdC_t, mode, 3, in);
262 
263  /* flags */
264  arch_irn_flags_t irn_flags = arch_irn_flags_none;
265 
266  /* init node attributes */
267  int const n_res = 0;
268  (void)irn_flags, (void)n_res;
269 
270  verify_new_node(res);
271  return optimize_node(res);
272 }
273 
274 ir_node *new_bd_arm_Add_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
275 {
276  static arch_register_req_t const *in_reqs[] = {
277  &arm_class_reg_req_gp,
278  };
279 
280  /* construct in array */
281  ir_node *const in[] = {
282  left,
283  };
284 
285  ir_graph *const irg = get_irn_irg(block);
286  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Add, arm_mode_gp, 1, in);
287 
288  /* flags */
289  arch_irn_flags_t irn_flags = arch_irn_flags_none;
290  irn_flags |= arch_irn_flag_rematerializable;
291 
292  /* init node attributes */
293  int const n_res = 1;
294  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
295  (void)attr; /* avoid potential warning */
296  init_arm_attributes(res, irn_flags, in_reqs, n_res);
297  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
298  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
299  out_infos[0].req = &arm_class_reg_req_gp;
300 
301  verify_new_node(res);
302  return optimize_node(res);
303 }
304 
305 ir_node *new_bd_arm_Add_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
306 {
307  static arch_register_req_t const *in_reqs[] = {
308  &arm_class_reg_req_gp,
309  &arm_class_reg_req_gp,
310  };
311 
312  /* construct in array */
313  ir_node *const in[] = {
314  left,
315  right,
316  };
317 
318  ir_graph *const irg = get_irn_irg(block);
319  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Add, arm_mode_gp, 2, in);
320 
321  /* flags */
322  arch_irn_flags_t irn_flags = arch_irn_flags_none;
323  irn_flags |= arch_irn_flag_rematerializable;
324 
325  /* init node attributes */
326  int const n_res = 1;
327  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
328  (void)attr; /* avoid potential warning */
329  init_arm_attributes(res, irn_flags, in_reqs, n_res);
330  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
331  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
332  out_infos[0].req = &arm_class_reg_req_gp;
333 
334  verify_new_node(res);
335  return optimize_node(res);
336 }
337 
338 ir_node *new_bd_arm_Add_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
339 {
340  static arch_register_req_t const *in_reqs[] = {
341  &arm_class_reg_req_gp,
342  &arm_class_reg_req_gp,
343  };
344 
345  /* construct in array */
346  ir_node *const in[] = {
347  left,
348  right,
349  };
350 
351  ir_graph *const irg = get_irn_irg(block);
352  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Add, arm_mode_gp, 2, in);
353 
354  /* flags */
355  arch_irn_flags_t irn_flags = arch_irn_flags_none;
356  irn_flags |= arch_irn_flag_rematerializable;
357 
358  /* init node attributes */
359  int const n_res = 1;
360  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
361  (void)attr; /* avoid potential warning */
362  init_arm_attributes(res, irn_flags, in_reqs, n_res);
363  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
364  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
365  out_infos[0].req = &arm_class_reg_req_gp;
366 
367  verify_new_node(res);
368  return optimize_node(res);
369 }
370 
371 ir_node *new_bd_arm_Add_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
372 {
373  static arch_register_req_t const *in_reqs[] = {
374  &arm_class_reg_req_gp,
375  &arm_class_reg_req_gp,
376  &arm_class_reg_req_gp,
377  };
378 
379  /* construct in array */
380  ir_node *const in[] = {
381  left,
382  right,
383  shift,
384  };
385 
386  ir_graph *const irg = get_irn_irg(block);
387  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Add, arm_mode_gp, 3, in);
388 
389  /* flags */
390  arch_irn_flags_t irn_flags = arch_irn_flags_none;
391  irn_flags |= arch_irn_flag_rematerializable;
392 
393  /* init node attributes */
394  int const n_res = 1;
395  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
396  (void)attr; /* avoid potential warning */
397  init_arm_attributes(res, irn_flags, in_reqs, n_res);
398  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
399  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
400  out_infos[0].req = &arm_class_reg_req_gp;
401 
402  verify_new_node(res);
403  return optimize_node(res);
404 }
405 
406 ir_node *new_bd_arm_AddS_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
407 {
408  static arch_register_req_t const *in_reqs[] = {
409  &arm_class_reg_req_gp,
410  };
411 
412  /* construct in array */
413  ir_node *const in[] = {
414  left,
415  };
416 
417  ir_graph *const irg = get_irn_irg(block);
418  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AddS, mode_T, 1, in);
419 
420  /* flags */
421  arch_irn_flags_t irn_flags = arch_irn_flags_none;
422  irn_flags |= arch_irn_flag_modify_flags;
423  irn_flags |= arch_irn_flag_rematerializable;
424 
425  /* init node attributes */
426  int const n_res = 2;
427  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
428  (void)attr; /* avoid potential warning */
429  init_arm_attributes(res, irn_flags, in_reqs, n_res);
430  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
431  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
432  out_infos[0].req = &arm_class_reg_req_gp;
433  out_infos[1].req = &arm_class_reg_req_flags;
434 
435  verify_new_node(res);
436  return optimize_node(res);
437 }
438 
439 ir_node *new_bd_arm_AddS_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
440 {
441  static arch_register_req_t const *in_reqs[] = {
442  &arm_class_reg_req_gp,
443  &arm_class_reg_req_gp,
444  };
445 
446  /* construct in array */
447  ir_node *const in[] = {
448  left,
449  right,
450  };
451 
452  ir_graph *const irg = get_irn_irg(block);
453  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AddS, mode_T, 2, in);
454 
455  /* flags */
456  arch_irn_flags_t irn_flags = arch_irn_flags_none;
457  irn_flags |= arch_irn_flag_modify_flags;
458  irn_flags |= arch_irn_flag_rematerializable;
459 
460  /* init node attributes */
461  int const n_res = 2;
462  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
463  (void)attr; /* avoid potential warning */
464  init_arm_attributes(res, irn_flags, in_reqs, n_res);
465  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
466  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
467  out_infos[0].req = &arm_class_reg_req_gp;
468  out_infos[1].req = &arm_class_reg_req_flags;
469 
470  verify_new_node(res);
471  return optimize_node(res);
472 }
473 
474 ir_node *new_bd_arm_AddS_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
475 {
476  static arch_register_req_t const *in_reqs[] = {
477  &arm_class_reg_req_gp,
478  &arm_class_reg_req_gp,
479  };
480 
481  /* construct in array */
482  ir_node *const in[] = {
483  left,
484  right,
485  };
486 
487  ir_graph *const irg = get_irn_irg(block);
488  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AddS, mode_T, 2, in);
489 
490  /* flags */
491  arch_irn_flags_t irn_flags = arch_irn_flags_none;
492  irn_flags |= arch_irn_flag_modify_flags;
493  irn_flags |= arch_irn_flag_rematerializable;
494 
495  /* init node attributes */
496  int const n_res = 2;
497  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
498  (void)attr; /* avoid potential warning */
499  init_arm_attributes(res, irn_flags, in_reqs, n_res);
500  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
501  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
502  out_infos[0].req = &arm_class_reg_req_gp;
503  out_infos[1].req = &arm_class_reg_req_flags;
504 
505  verify_new_node(res);
506  return optimize_node(res);
507 }
508 
509 ir_node *new_bd_arm_AddS_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
510 {
511  static arch_register_req_t const *in_reqs[] = {
512  &arm_class_reg_req_gp,
513  &arm_class_reg_req_gp,
514  &arm_class_reg_req_gp,
515  };
516 
517  /* construct in array */
518  ir_node *const in[] = {
519  left,
520  right,
521  shift,
522  };
523 
524  ir_graph *const irg = get_irn_irg(block);
525  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AddS, mode_T, 3, in);
526 
527  /* flags */
528  arch_irn_flags_t irn_flags = arch_irn_flags_none;
529  irn_flags |= arch_irn_flag_modify_flags;
530  irn_flags |= arch_irn_flag_rematerializable;
531 
532  /* init node attributes */
533  int const n_res = 2;
534  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
535  (void)attr; /* avoid potential warning */
536  init_arm_attributes(res, irn_flags, in_reqs, n_res);
537  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
538  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
539  out_infos[0].req = &arm_class_reg_req_gp;
540  out_infos[1].req = &arm_class_reg_req_flags;
541 
542  verify_new_node(res);
543  return optimize_node(res);
544 }
545 
546 ir_node *new_bd_arm_AddS_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
547 {
548 
549  /* construct in array */
550  ir_node *const in[] = {
551  left,
552  right,
553  };
554 
555  ir_graph *const irg = get_irn_irg(block);
556  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_AddS_t, mode_T, 2, in);
557 
558  /* flags */
559  arch_irn_flags_t irn_flags = arch_irn_flags_none;
560 
561  /* init node attributes */
562  int const n_res = 2;
563  (void)irn_flags, (void)n_res;
564 
565  verify_new_node(res);
566  return optimize_node(res);
567 }
568 
569 ir_node *new_bd_arm_Address(dbg_info *dbgi, ir_node *block, ir_entity *entity, int offset)
570 {
571  arch_register_req_t const **const in_reqs = NULL;
572 
573 
574  ir_graph *const irg = get_irn_irg(block);
575  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Address, arm_mode_gp, 0, NULL);
576 
577  /* flags */
578  arch_irn_flags_t irn_flags = arch_irn_flags_none;
579  irn_flags |= arch_irn_flag_rematerializable;
580 
581  /* init node attributes */
582  int const n_res = 1;
583  arm_Address_attr_t *const attr = (arm_Address_attr_t*)get_irn_generic_attr(res);
584  (void)attr; /* avoid potential warning */
585  init_arm_attributes(res, irn_flags, in_reqs, n_res);
586  init_arm_Address_attributes(res, entity, offset);
587  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
588  out_infos[0].req = &arm_class_reg_req_gp;
589 
590  verify_new_node(res);
591  return optimize_node(res);
592 }
593 
594 ir_node *new_bd_arm_Adf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode)
595 {
596  static arch_register_req_t const *in_reqs[] = {
597  &arm_class_reg_req_fpa,
598  &arm_class_reg_req_fpa,
599  };
600 
601  /* construct in array */
602  ir_node *const in[] = {
603  op0,
604  op1,
605  };
606 
607  ir_graph *const irg = get_irn_irg(block);
608  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Adf, mode_F, 2, in);
609 
610  /* flags */
611  arch_irn_flags_t irn_flags = arch_irn_flags_none;
612  irn_flags |= arch_irn_flag_rematerializable;
613 
614  /* init node attributes */
615  int const n_res = 1;
616  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
617  (void)attr; /* avoid potential warning */
618  init_arm_attributes(res, irn_flags, in_reqs, n_res);
619  init_arm_farith_attributes(res, op_mode);
620  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
621  out_infos[0].req = &arm_class_reg_req_fpa;
622 
623  verify_new_node(res);
624  return optimize_node(res);
625 }
626 
627 ir_node *new_bd_arm_And_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
628 {
629  static arch_register_req_t const *in_reqs[] = {
630  &arm_class_reg_req_gp,
631  };
632 
633  /* construct in array */
634  ir_node *const in[] = {
635  left,
636  };
637 
638  ir_graph *const irg = get_irn_irg(block);
639  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_And, arm_mode_gp, 1, in);
640 
641  /* flags */
642  arch_irn_flags_t irn_flags = arch_irn_flags_none;
643  irn_flags |= arch_irn_flag_rematerializable;
644 
645  /* init node attributes */
646  int const n_res = 1;
647  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
648  (void)attr; /* avoid potential warning */
649  init_arm_attributes(res, irn_flags, in_reqs, n_res);
650  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
651  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
652  out_infos[0].req = &arm_class_reg_req_gp;
653 
654  verify_new_node(res);
655  return optimize_node(res);
656 }
657 
658 ir_node *new_bd_arm_And_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
659 {
660  static arch_register_req_t const *in_reqs[] = {
661  &arm_class_reg_req_gp,
662  &arm_class_reg_req_gp,
663  };
664 
665  /* construct in array */
666  ir_node *const in[] = {
667  left,
668  right,
669  };
670 
671  ir_graph *const irg = get_irn_irg(block);
672  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_And, arm_mode_gp, 2, in);
673 
674  /* flags */
675  arch_irn_flags_t irn_flags = arch_irn_flags_none;
676  irn_flags |= arch_irn_flag_rematerializable;
677 
678  /* init node attributes */
679  int const n_res = 1;
680  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
681  (void)attr; /* avoid potential warning */
682  init_arm_attributes(res, irn_flags, in_reqs, n_res);
683  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
684  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
685  out_infos[0].req = &arm_class_reg_req_gp;
686 
687  verify_new_node(res);
688  return optimize_node(res);
689 }
690 
691 ir_node *new_bd_arm_And_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
692 {
693  static arch_register_req_t const *in_reqs[] = {
694  &arm_class_reg_req_gp,
695  &arm_class_reg_req_gp,
696  };
697 
698  /* construct in array */
699  ir_node *const in[] = {
700  left,
701  right,
702  };
703 
704  ir_graph *const irg = get_irn_irg(block);
705  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_And, arm_mode_gp, 2, in);
706 
707  /* flags */
708  arch_irn_flags_t irn_flags = arch_irn_flags_none;
709  irn_flags |= arch_irn_flag_rematerializable;
710 
711  /* init node attributes */
712  int const n_res = 1;
713  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
714  (void)attr; /* avoid potential warning */
715  init_arm_attributes(res, irn_flags, in_reqs, n_res);
716  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
717  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
718  out_infos[0].req = &arm_class_reg_req_gp;
719 
720  verify_new_node(res);
721  return optimize_node(res);
722 }
723 
724 ir_node *new_bd_arm_And_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
725 {
726  static arch_register_req_t const *in_reqs[] = {
727  &arm_class_reg_req_gp,
728  &arm_class_reg_req_gp,
729  &arm_class_reg_req_gp,
730  };
731 
732  /* construct in array */
733  ir_node *const in[] = {
734  left,
735  right,
736  shift,
737  };
738 
739  ir_graph *const irg = get_irn_irg(block);
740  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_And, arm_mode_gp, 3, in);
741 
742  /* flags */
743  arch_irn_flags_t irn_flags = arch_irn_flags_none;
744  irn_flags |= arch_irn_flag_rematerializable;
745 
746  /* init node attributes */
747  int const n_res = 1;
748  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
749  (void)attr; /* avoid potential warning */
750  init_arm_attributes(res, irn_flags, in_reqs, n_res);
751  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
752  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
753  out_infos[0].req = &arm_class_reg_req_gp;
754 
755  verify_new_node(res);
756  return optimize_node(res);
757 }
758 
759 ir_node *new_bd_arm_B(dbg_info *dbgi, ir_node *block)
760 {
761  arch_register_req_t const **const in_reqs = NULL;
762 
763 
764  ir_graph *const irg = get_irn_irg(block);
765  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_B, mode_X, 0, NULL);
766 
767  /* flags */
768  arch_irn_flags_t irn_flags = arch_irn_flags_none;
769  irn_flags |= arch_irn_flag_simple_jump;
770 
771  /* init node attributes */
772  int const n_res = 1;
773  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
774  (void)attr; /* avoid potential warning */
775  init_arm_attributes(res, irn_flags, in_reqs, n_res);
776  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
777  out_infos[0].req = &arch_exec_requirement;
778 
779  verify_new_node(res);
780  return optimize_node(res);
781 }
782 
783 ir_node *new_bd_arm_Bcc(dbg_info *dbgi, ir_node *block, ir_node *flags, ir_relation relation)
784 {
785  static arch_register_req_t const *in_reqs[] = {
786  &arm_class_reg_req_flags,
787  };
788 
789  /* construct in array */
790  ir_node *const in[] = {
791  flags,
792  };
793 
794  ir_graph *const irg = get_irn_irg(block);
795  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bcc, mode_T, 1, in);
796 
797  /* flags */
798  arch_irn_flags_t irn_flags = arch_irn_flags_none;
799 
800  /* init node attributes */
801  int const n_res = 2;
802  arm_CondJmp_attr_t *const attr = (arm_CondJmp_attr_t*)get_irn_generic_attr(res);
803  (void)attr; /* avoid potential warning */
804  init_arm_attributes(res, irn_flags, in_reqs, n_res);
805  set_arm_CondJmp_relation(res, relation);
806  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
807  out_infos[0].req = &arch_exec_requirement;
808  out_infos[1].req = &arch_exec_requirement;
809 
810  verify_new_node(res);
811  return optimize_node(res);
812 }
813 
814 ir_node *new_bd_arm_Bic_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
815 {
816  static arch_register_req_t const *in_reqs[] = {
817  &arm_class_reg_req_gp,
818  };
819 
820  /* construct in array */
821  ir_node *const in[] = {
822  left,
823  };
824 
825  ir_graph *const irg = get_irn_irg(block);
826  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bic, arm_mode_gp, 1, in);
827 
828  /* flags */
829  arch_irn_flags_t irn_flags = arch_irn_flags_none;
830  irn_flags |= arch_irn_flag_rematerializable;
831 
832  /* init node attributes */
833  int const n_res = 1;
834  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
835  (void)attr; /* avoid potential warning */
836  init_arm_attributes(res, irn_flags, in_reqs, n_res);
837  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
838  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
839  out_infos[0].req = &arm_class_reg_req_gp;
840 
841  verify_new_node(res);
842  return optimize_node(res);
843 }
844 
845 ir_node *new_bd_arm_Bic_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
846 {
847  static arch_register_req_t const *in_reqs[] = {
848  &arm_class_reg_req_gp,
849  &arm_class_reg_req_gp,
850  };
851 
852  /* construct in array */
853  ir_node *const in[] = {
854  left,
855  right,
856  };
857 
858  ir_graph *const irg = get_irn_irg(block);
859  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bic, arm_mode_gp, 2, in);
860 
861  /* flags */
862  arch_irn_flags_t irn_flags = arch_irn_flags_none;
863  irn_flags |= arch_irn_flag_rematerializable;
864 
865  /* init node attributes */
866  int const n_res = 1;
867  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
868  (void)attr; /* avoid potential warning */
869  init_arm_attributes(res, irn_flags, in_reqs, n_res);
870  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
871  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
872  out_infos[0].req = &arm_class_reg_req_gp;
873 
874  verify_new_node(res);
875  return optimize_node(res);
876 }
877 
878 ir_node *new_bd_arm_Bic_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
879 {
880  static arch_register_req_t const *in_reqs[] = {
881  &arm_class_reg_req_gp,
882  &arm_class_reg_req_gp,
883  };
884 
885  /* construct in array */
886  ir_node *const in[] = {
887  left,
888  right,
889  };
890 
891  ir_graph *const irg = get_irn_irg(block);
892  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bic, arm_mode_gp, 2, in);
893 
894  /* flags */
895  arch_irn_flags_t irn_flags = arch_irn_flags_none;
896  irn_flags |= arch_irn_flag_rematerializable;
897 
898  /* init node attributes */
899  int const n_res = 1;
900  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
901  (void)attr; /* avoid potential warning */
902  init_arm_attributes(res, irn_flags, in_reqs, n_res);
903  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
904  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
905  out_infos[0].req = &arm_class_reg_req_gp;
906 
907  verify_new_node(res);
908  return optimize_node(res);
909 }
910 
911 ir_node *new_bd_arm_Bic_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
912 {
913  static arch_register_req_t const *in_reqs[] = {
914  &arm_class_reg_req_gp,
915  &arm_class_reg_req_gp,
916  &arm_class_reg_req_gp,
917  };
918 
919  /* construct in array */
920  ir_node *const in[] = {
921  left,
922  right,
923  shift,
924  };
925 
926  ir_graph *const irg = get_irn_irg(block);
927  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bic, arm_mode_gp, 3, in);
928 
929  /* flags */
930  arch_irn_flags_t irn_flags = arch_irn_flags_none;
931  irn_flags |= arch_irn_flag_rematerializable;
932 
933  /* init node attributes */
934  int const n_res = 1;
935  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
936  (void)attr; /* avoid potential warning */
937  init_arm_attributes(res, irn_flags, in_reqs, n_res);
938  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
939  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
940  out_infos[0].req = &arm_class_reg_req_gp;
941 
942  verify_new_node(res);
943  return optimize_node(res);
944 }
945 
946 ir_node *new_bd_arm_Bl(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, int n_res, ir_entity *entity, int offset)
947 {
948 
949 
950  ir_graph *const irg = get_irn_irg(block);
951  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Bl, mode_T, arity, in);
952 
953  /* flags */
954  arch_irn_flags_t irn_flags = arch_irn_flags_none;
955  irn_flags |= arch_irn_flag_modify_flags;
956 
957  /* init node attributes */
958  arm_Address_attr_t *const attr = (arm_Address_attr_t*)get_irn_generic_attr(res);
959  (void)attr; /* avoid potential warning */
960  init_arm_attributes(res, irn_flags, in_reqs, n_res);
961  init_arm_Address_attributes(res, entity, offset);
962 
963  verify_new_node(res);
964  return optimize_node(res);
965 }
966 
967 ir_node *new_bd_arm_Clz(dbg_info *dbgi, ir_node *block, ir_node *op0)
968 {
969  static arch_register_req_t const *in_reqs[] = {
970  &arm_class_reg_req_gp,
971  };
972 
973  /* construct in array */
974  ir_node *const in[] = {
975  op0,
976  };
977 
978  ir_graph *const irg = get_irn_irg(block);
979  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Clz, arm_mode_gp, 1, in);
980 
981  /* flags */
982  arch_irn_flags_t irn_flags = arch_irn_flags_none;
983  irn_flags |= arch_irn_flag_rematerializable;
984 
985  /* init node attributes */
986  int const n_res = 1;
987  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
988  (void)attr; /* avoid potential warning */
989  init_arm_attributes(res, irn_flags, in_reqs, n_res);
990  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
991  out_infos[0].req = &arm_class_reg_req_gp;
992 
993  verify_new_node(res);
994  return optimize_node(res);
995 }
996 
997 ir_node *new_bd_arm_Cmfe(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, bool ins_permuted)
998 {
999  static arch_register_req_t const *in_reqs[] = {
1000  &arm_class_reg_req_fpa,
1001  &arm_class_reg_req_fpa,
1002  };
1003 
1004  /* construct in array */
1005  ir_node *const in[] = {
1006  op0,
1007  op1,
1008  };
1009 
1010  ir_graph *const irg = get_irn_irg(block);
1011  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmfe, arm_mode_flags, 2, in);
1012 
1013  /* flags */
1014  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1015  irn_flags |= arch_irn_flag_rematerializable;
1016  irn_flags |= arch_irn_flag_modify_flags;
1017 
1018  /* init node attributes */
1019  int const n_res = 1;
1020  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1021  (void)attr; /* avoid potential warning */
1022  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1023  init_arm_cmp_attr(res, ins_permuted, false);
1024  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1025  out_infos[0].req = &arm_class_reg_req_flags;
1026 
1027  verify_new_node(res);
1028  return optimize_node(res);
1029 }
1030 
1031 ir_node *new_bd_arm_Cmn_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot, bool ins_permuted, bool is_unsigned)
1032 {
1033  static arch_register_req_t const *in_reqs[] = {
1034  &arm_class_reg_req_gp,
1035  };
1036 
1037  /* construct in array */
1038  ir_node *const in[] = {
1039  left,
1040  };
1041 
1042  ir_graph *const irg = get_irn_irg(block);
1043  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 1, in);
1044 
1045  /* flags */
1046  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1047  irn_flags |= arch_irn_flag_rematerializable;
1048  irn_flags |= arch_irn_flag_modify_flags;
1049 
1050  /* init node attributes */
1051  int const n_res = 1;
1052  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1053  (void)attr; /* avoid potential warning */
1054  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1055  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1056  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1057  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1058  out_infos[0].req = &arm_class_reg_req_flags;
1059 
1060  verify_new_node(res);
1061  return optimize_node(res);
1062 }
1063 
1064 ir_node *new_bd_arm_Cmn_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, bool ins_permuted, bool is_unsigned)
1065 {
1066  static arch_register_req_t const *in_reqs[] = {
1067  &arm_class_reg_req_gp,
1068  &arm_class_reg_req_gp,
1069  };
1070 
1071  /* construct in array */
1072  ir_node *const in[] = {
1073  left,
1074  right,
1075  };
1076 
1077  ir_graph *const irg = get_irn_irg(block);
1078  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 2, in);
1079 
1080  /* flags */
1081  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1082  irn_flags |= arch_irn_flag_rematerializable;
1083  irn_flags |= arch_irn_flag_modify_flags;
1084 
1085  /* init node attributes */
1086  int const n_res = 1;
1087  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1088  (void)attr; /* avoid potential warning */
1089  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1090  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1091  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1092  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1093  out_infos[0].req = &arm_class_reg_req_flags;
1094 
1095  verify_new_node(res);
1096  return optimize_node(res);
1097 }
1098 
1099 ir_node *new_bd_arm_Cmn_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate, bool ins_permuted, bool is_unsigned)
1100 {
1101  static arch_register_req_t const *in_reqs[] = {
1102  &arm_class_reg_req_gp,
1103  &arm_class_reg_req_gp,
1104  };
1105 
1106  /* construct in array */
1107  ir_node *const in[] = {
1108  left,
1109  right,
1110  };
1111 
1112  ir_graph *const irg = get_irn_irg(block);
1113  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 2, in);
1114 
1115  /* flags */
1116  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1117  irn_flags |= arch_irn_flag_rematerializable;
1118  irn_flags |= arch_irn_flag_modify_flags;
1119 
1120  /* init node attributes */
1121  int const n_res = 1;
1122  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1123  (void)attr; /* avoid potential warning */
1124  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1125  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1126  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1127  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1128  out_infos[0].req = &arm_class_reg_req_flags;
1129 
1130  verify_new_node(res);
1131  return optimize_node(res);
1132 }
1133 
1134 ir_node *new_bd_arm_Cmn_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier, bool ins_permuted, bool is_unsigned)
1135 {
1136  static arch_register_req_t const *in_reqs[] = {
1137  &arm_class_reg_req_gp,
1138  &arm_class_reg_req_gp,
1139  &arm_class_reg_req_gp,
1140  };
1141 
1142  /* construct in array */
1143  ir_node *const in[] = {
1144  left,
1145  right,
1146  shift,
1147  };
1148 
1149  ir_graph *const irg = get_irn_irg(block);
1150  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmn, arm_mode_flags, 3, in);
1151 
1152  /* flags */
1153  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1154  irn_flags |= arch_irn_flag_rematerializable;
1155  irn_flags |= arch_irn_flag_modify_flags;
1156 
1157  /* init node attributes */
1158  int const n_res = 1;
1159  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1160  (void)attr; /* avoid potential warning */
1161  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1162  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1163  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1164  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1165  out_infos[0].req = &arm_class_reg_req_flags;
1166 
1167  verify_new_node(res);
1168  return optimize_node(res);
1169 }
1170 
1171 ir_node *new_bd_arm_Cmp_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot, bool ins_permuted, bool is_unsigned)
1172 {
1173  static arch_register_req_t const *in_reqs[] = {
1174  &arm_class_reg_req_gp,
1175  };
1176 
1177  /* construct in array */
1178  ir_node *const in[] = {
1179  left,
1180  };
1181 
1182  ir_graph *const irg = get_irn_irg(block);
1183  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 1, in);
1184 
1185  /* flags */
1186  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1187  irn_flags |= arch_irn_flag_rematerializable;
1188  irn_flags |= arch_irn_flag_modify_flags;
1189 
1190  /* init node attributes */
1191  int const n_res = 1;
1192  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1193  (void)attr; /* avoid potential warning */
1194  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1195  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1196  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1197  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1198  out_infos[0].req = &arm_class_reg_req_flags;
1199 
1200  verify_new_node(res);
1201  return optimize_node(res);
1202 }
1203 
1204 ir_node *new_bd_arm_Cmp_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, bool ins_permuted, bool is_unsigned)
1205 {
1206  static arch_register_req_t const *in_reqs[] = {
1207  &arm_class_reg_req_gp,
1208  &arm_class_reg_req_gp,
1209  };
1210 
1211  /* construct in array */
1212  ir_node *const in[] = {
1213  left,
1214  right,
1215  };
1216 
1217  ir_graph *const irg = get_irn_irg(block);
1218  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 2, in);
1219 
1220  /* flags */
1221  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1222  irn_flags |= arch_irn_flag_rematerializable;
1223  irn_flags |= arch_irn_flag_modify_flags;
1224 
1225  /* init node attributes */
1226  int const n_res = 1;
1227  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1228  (void)attr; /* avoid potential warning */
1229  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1230  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1231  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1232  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1233  out_infos[0].req = &arm_class_reg_req_flags;
1234 
1235  verify_new_node(res);
1236  return optimize_node(res);
1237 }
1238 
1239 ir_node *new_bd_arm_Cmp_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate, bool ins_permuted, bool is_unsigned)
1240 {
1241  static arch_register_req_t const *in_reqs[] = {
1242  &arm_class_reg_req_gp,
1243  &arm_class_reg_req_gp,
1244  };
1245 
1246  /* construct in array */
1247  ir_node *const in[] = {
1248  left,
1249  right,
1250  };
1251 
1252  ir_graph *const irg = get_irn_irg(block);
1253  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 2, in);
1254 
1255  /* flags */
1256  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1257  irn_flags |= arch_irn_flag_rematerializable;
1258  irn_flags |= arch_irn_flag_modify_flags;
1259 
1260  /* init node attributes */
1261  int const n_res = 1;
1262  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1263  (void)attr; /* avoid potential warning */
1264  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1265  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1266  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1267  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1268  out_infos[0].req = &arm_class_reg_req_flags;
1269 
1270  verify_new_node(res);
1271  return optimize_node(res);
1272 }
1273 
1274 ir_node *new_bd_arm_Cmp_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier, bool ins_permuted, bool is_unsigned)
1275 {
1276  static arch_register_req_t const *in_reqs[] = {
1277  &arm_class_reg_req_gp,
1278  &arm_class_reg_req_gp,
1279  &arm_class_reg_req_gp,
1280  };
1281 
1282  /* construct in array */
1283  ir_node *const in[] = {
1284  left,
1285  right,
1286  shift,
1287  };
1288 
1289  ir_graph *const irg = get_irn_irg(block);
1290  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Cmp, arm_mode_flags, 3, in);
1291 
1292  /* flags */
1293  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1294  irn_flags |= arch_irn_flag_rematerializable;
1295  irn_flags |= arch_irn_flag_modify_flags;
1296 
1297  /* init node attributes */
1298  int const n_res = 1;
1299  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
1300  (void)attr; /* avoid potential warning */
1301  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1302  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1303  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
1304  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1305  out_infos[0].req = &arm_class_reg_req_flags;
1306 
1307  verify_new_node(res);
1308  return optimize_node(res);
1309 }
1310 
1311 ir_node *new_bd_arm_Dvf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode)
1312 {
1313  static arch_register_req_t const *in_reqs[] = {
1314  &arm_class_reg_req_fpa,
1315  &arm_class_reg_req_fpa,
1316  };
1317 
1318  /* construct in array */
1319  ir_node *const in[] = {
1320  op0,
1321  op1,
1322  };
1323 
1324  ir_graph *const irg = get_irn_irg(block);
1325  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Dvf, mode_F, 2, in);
1326 
1327  /* flags */
1328  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1329 
1330  /* init node attributes */
1331  int const n_res = 2;
1332  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
1333  (void)attr; /* avoid potential warning */
1334  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1335  init_arm_farith_attributes(res, op_mode);
1336  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1337  out_infos[0].req = &arm_class_reg_req_fpa;
1338  out_infos[1].req = &arch_memory_requirement;
1339 
1340  verify_new_node(res);
1341  return optimize_node(res);
1342 }
1343 
1344 ir_node *new_bd_arm_Eor_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
1345 {
1346  static arch_register_req_t const *in_reqs[] = {
1347  &arm_class_reg_req_gp,
1348  };
1349 
1350  /* construct in array */
1351  ir_node *const in[] = {
1352  left,
1353  };
1354 
1355  ir_graph *const irg = get_irn_irg(block);
1356  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Eor, arm_mode_gp, 1, in);
1357 
1358  /* flags */
1359  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1360  irn_flags |= arch_irn_flag_rematerializable;
1361 
1362  /* init node attributes */
1363  int const n_res = 1;
1364  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1365  (void)attr; /* avoid potential warning */
1366  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1367  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
1368  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1369  out_infos[0].req = &arm_class_reg_req_gp;
1370 
1371  verify_new_node(res);
1372  return optimize_node(res);
1373 }
1374 
1375 ir_node *new_bd_arm_Eor_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
1376 {
1377  static arch_register_req_t const *in_reqs[] = {
1378  &arm_class_reg_req_gp,
1379  &arm_class_reg_req_gp,
1380  };
1381 
1382  /* construct in array */
1383  ir_node *const in[] = {
1384  left,
1385  right,
1386  };
1387 
1388  ir_graph *const irg = get_irn_irg(block);
1389  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Eor, arm_mode_gp, 2, in);
1390 
1391  /* flags */
1392  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1393  irn_flags |= arch_irn_flag_rematerializable;
1394 
1395  /* init node attributes */
1396  int const n_res = 1;
1397  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1398  (void)attr; /* avoid potential warning */
1399  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1400  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
1401  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1402  out_infos[0].req = &arm_class_reg_req_gp;
1403 
1404  verify_new_node(res);
1405  return optimize_node(res);
1406 }
1407 
1408 ir_node *new_bd_arm_Eor_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
1409 {
1410  static arch_register_req_t const *in_reqs[] = {
1411  &arm_class_reg_req_gp,
1412  &arm_class_reg_req_gp,
1413  };
1414 
1415  /* construct in array */
1416  ir_node *const in[] = {
1417  left,
1418  right,
1419  };
1420 
1421  ir_graph *const irg = get_irn_irg(block);
1422  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Eor, arm_mode_gp, 2, in);
1423 
1424  /* flags */
1425  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1426  irn_flags |= arch_irn_flag_rematerializable;
1427 
1428  /* init node attributes */
1429  int const n_res = 1;
1430  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1431  (void)attr; /* avoid potential warning */
1432  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1433  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
1434  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1435  out_infos[0].req = &arm_class_reg_req_gp;
1436 
1437  verify_new_node(res);
1438  return optimize_node(res);
1439 }
1440 
1441 ir_node *new_bd_arm_Eor_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
1442 {
1443  static arch_register_req_t const *in_reqs[] = {
1444  &arm_class_reg_req_gp,
1445  &arm_class_reg_req_gp,
1446  &arm_class_reg_req_gp,
1447  };
1448 
1449  /* construct in array */
1450  ir_node *const in[] = {
1451  left,
1452  right,
1453  shift,
1454  };
1455 
1456  ir_graph *const irg = get_irn_irg(block);
1457  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Eor, arm_mode_gp, 3, in);
1458 
1459  /* flags */
1460  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1461  irn_flags |= arch_irn_flag_rematerializable;
1462 
1463  /* init node attributes */
1464  int const n_res = 1;
1465  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1466  (void)attr; /* avoid potential warning */
1467  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1468  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
1469  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1470  out_infos[0].req = &arm_class_reg_req_gp;
1471 
1472  verify_new_node(res);
1473  return optimize_node(res);
1474 }
1475 
1476 ir_node *new_bd_arm_Flt(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_mode *op_mode)
1477 {
1478  static arch_register_req_t const *in_reqs[] = {
1479  &arm_class_reg_req_gp,
1480  };
1481 
1482  /* construct in array */
1483  ir_node *const in[] = {
1484  op0,
1485  };
1486 
1487  ir_graph *const irg = get_irn_irg(block);
1488  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Flt, mode_F, 1, in);
1489 
1490  /* flags */
1491  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1492  irn_flags |= arch_irn_flag_rematerializable;
1493 
1494  /* init node attributes */
1495  int const n_res = 1;
1496  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
1497  (void)attr; /* avoid potential warning */
1498  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1499  init_arm_farith_attributes(res, op_mode);
1500  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1501  out_infos[0].req = &arm_class_reg_req_fpa;
1502 
1503  verify_new_node(res);
1504  return optimize_node(res);
1505 }
1506 
1507 ir_node *new_bd_arm_FrameAddr(dbg_info *dbgi, ir_node *block, ir_node *base, ir_entity *entity, int offset)
1508 {
1509  static arch_register_req_t const *in_reqs[] = {
1510  &arm_class_reg_req_gp,
1511  };
1512 
1513  /* construct in array */
1514  ir_node *const in[] = {
1515  base,
1516  };
1517 
1518  ir_graph *const irg = get_irn_irg(block);
1519  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_FrameAddr, arm_mode_gp, 1, in);
1520 
1521  /* flags */
1522  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1523  irn_flags |= arch_irn_flag_rematerializable;
1524 
1525  /* init node attributes */
1526  int const n_res = 1;
1527  arm_Address_attr_t *const attr = (arm_Address_attr_t*)get_irn_generic_attr(res);
1528  (void)attr; /* avoid potential warning */
1529  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1530  init_arm_Address_attributes(res, entity, offset);
1531  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1532  out_infos[0].req = &arm_class_reg_req_gp;
1533 
1534  verify_new_node(res);
1535  return optimize_node(res);
1536 }
1537 
1538 ir_node *new_bd_arm_IJmp(dbg_info *dbgi, ir_node *block, ir_node *target)
1539 {
1540  static arch_register_req_t const *in_reqs[] = {
1541  &arm_class_reg_req_gp,
1542  };
1543 
1544  /* construct in array */
1545  ir_node *const in[] = {
1546  target,
1547  };
1548 
1549  ir_graph *const irg = get_irn_irg(block);
1550  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_IJmp, mode_X, 1, in);
1551 
1552  /* flags */
1553  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1554 
1555  /* init node attributes */
1556  int const n_res = 1;
1557  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
1558  (void)attr; /* avoid potential warning */
1559  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1560  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1561  out_infos[0].req = &arch_exec_requirement;
1562 
1563  verify_new_node(res);
1564  return optimize_node(res);
1565 }
1566 
1567 ir_node *new_bd_arm_Ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity)
1568 {
1569  static arch_register_req_t const *in_reqs[] = {
1570  &arm_class_reg_req_gp,
1571  &arch_memory_requirement,
1572  };
1573 
1574  /* construct in array */
1575  ir_node *const in[] = {
1576  ptr,
1577  mem,
1578  };
1579 
1580  ir_graph *const irg = get_irn_irg(block);
1581  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Ldf, mode_T, 2, in);
1582 
1583  /* flags */
1584  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1585 
1586  /* init node attributes */
1587  int const n_res = 2;
1588  arm_load_store_attr_t *const attr = (arm_load_store_attr_t*)get_irn_generic_attr(res);
1589  (void)attr; /* avoid potential warning */
1590  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1591  init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1592  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1593  out_infos[0].req = &arm_class_reg_req_fpa;
1594  out_infos[1].req = &arch_memory_requirement;
1595 
1596  verify_new_node(res);
1597  return optimize_node(res);
1598 }
1599 
1600 ir_node *new_bd_arm_Ldr(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity)
1601 {
1602  static arch_register_req_t const *in_reqs[] = {
1603  &arm_class_reg_req_gp,
1604  &arch_memory_requirement,
1605  };
1606 
1607  /* construct in array */
1608  ir_node *const in[] = {
1609  ptr,
1610  mem,
1611  };
1612 
1613  ir_graph *const irg = get_irn_irg(block);
1614  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Ldr, mode_T, 2, in);
1615 
1616  /* flags */
1617  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1618 
1619  /* init node attributes */
1620  int const n_res = 2;
1621  arm_load_store_attr_t *const attr = (arm_load_store_attr_t*)get_irn_generic_attr(res);
1622  (void)attr; /* avoid potential warning */
1623  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1624  init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1625  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1626  out_infos[0].req = &arm_class_reg_req_gp;
1627  out_infos[1].req = &arch_memory_requirement;
1628 
1629  verify_new_node(res);
1630  return optimize_node(res);
1631 }
1632 
1633 ir_node *new_bd_arm_LinkLdrPC(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, int n_res, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity)
1634 {
1635 
1636 
1637  ir_graph *const irg = get_irn_irg(block);
1638  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_LinkLdrPC, mode_T, arity, in);
1639 
1640  /* flags */
1641  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1642  irn_flags |= arch_irn_flag_modify_flags;
1643 
1644  /* init node attributes */
1645  arm_load_store_attr_t *const attr = (arm_load_store_attr_t*)get_irn_generic_attr(res);
1646  (void)attr; /* avoid potential warning */
1647  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1648  init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
1649 
1650  verify_new_node(res);
1651  return optimize_node(res);
1652 }
1653 
1654 ir_node *new_bd_arm_LinkMovPC(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, int n_res, unsigned shiftop_input, arm_shift_modifier_t shift_modifier, unsigned char immediate_value, unsigned char immediate_rot)
1655 {
1656 
1657 
1658  ir_graph *const irg = get_irn_irg(block);
1659  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_LinkMovPC, mode_T, arity, in);
1660 
1661  /* flags */
1662  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1663  irn_flags |= arch_irn_flag_modify_flags;
1664 
1665  /* init node attributes */
1666  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1667  (void)attr; /* avoid potential warning */
1668  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1669  init_arm_shifter_operand(res, shiftop_input, immediate_value, shift_modifier, immediate_rot);
1670 
1671 
1672  verify_new_node(res);
1673  return optimize_node(res);
1674 }
1675 
1676 ir_node *new_bd_arm_Mla(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *add)
1677 {
1678  static arch_register_req_t const *in_reqs[] = {
1679  &arm_class_reg_req_gp,
1680  &arm_class_reg_req_gp,
1681  &arm_class_reg_req_gp,
1682  };
1683 
1684  /* construct in array */
1685  ir_node *const in[] = {
1686  left,
1687  right,
1688  add,
1689  };
1690 
1691  ir_graph *const irg = get_irn_irg(block);
1692  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mla, arm_mode_gp, 3, in);
1693 
1694  /* flags */
1695  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1696  irn_flags |= arch_irn_flag_rematerializable;
1697 
1698  /* init node attributes */
1699  int const n_res = 1;
1700  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
1701  (void)attr; /* avoid potential warning */
1702  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1703  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1704  out_infos[0].req = &arm_class_reg_req_gp;
1705 
1706  verify_new_node(res);
1707  return optimize_node(res);
1708 }
1709 
1710 ir_node *new_bd_arm_Mla_v5(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *add)
1711 {
1712  static arch_register_req_t const *in_reqs[] = {
1713  &arm_class_reg_req_gp,
1714  &arm_class_reg_req_gp,
1715  &arm_class_reg_req_gp,
1716  };
1717 
1718  /* construct in array */
1719  ir_node *const in[] = {
1720  left,
1721  right,
1722  add,
1723  };
1724 
1725  ir_graph *const irg = get_irn_irg(block);
1726  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mla, arm_mode_gp, 3, in);
1727 
1728  /* flags */
1729  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1730  irn_flags |= arch_irn_flag_rematerializable;
1731 
1732  /* init node attributes */
1733  int const n_res = 1;
1734  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
1735  (void)attr; /* avoid potential warning */
1736  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1737  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1738  out_infos[0].req = &arm_requirements_gp_not_in_r0;
1739 
1740  verify_new_node(res);
1741  return optimize_node(res);
1742 }
1743 
1744 ir_node *new_bd_arm_Mls(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *sub)
1745 {
1746  static arch_register_req_t const *in_reqs[] = {
1747  &arm_class_reg_req_gp,
1748  &arm_class_reg_req_gp,
1749  &arm_class_reg_req_gp,
1750  };
1751 
1752  /* construct in array */
1753  ir_node *const in[] = {
1754  left,
1755  right,
1756  sub,
1757  };
1758 
1759  ir_graph *const irg = get_irn_irg(block);
1760  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mls, arm_mode_gp, 3, in);
1761 
1762  /* flags */
1763  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1764  irn_flags |= arch_irn_flag_rematerializable;
1765 
1766  /* init node attributes */
1767  int const n_res = 1;
1768  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
1769  (void)attr; /* avoid potential warning */
1770  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1771  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1772  out_infos[0].req = &arm_class_reg_req_gp;
1773 
1774  verify_new_node(res);
1775  return optimize_node(res);
1776 }
1777 
1778 ir_node *new_bd_arm_Mov_imm(dbg_info *dbgi, ir_node *block, unsigned char immediate_value, unsigned char immediate_rot)
1779 {
1780  static arch_register_req_t const *in_reqs[] = {
1781  };
1782 
1783 
1784  ir_graph *const irg = get_irn_irg(block);
1785  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mov, arm_mode_gp, 0, NULL);
1786 
1787  /* flags */
1788  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1789  irn_flags |= arch_irn_flag_rematerializable;
1790 
1791  /* init node attributes */
1792  int const n_res = 1;
1793  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1794  (void)attr; /* avoid potential warning */
1795  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1796  init_arm_shifter_operand(res, 0, immediate_value, ARM_SHF_IMM, immediate_rot);
1797  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1798  out_infos[0].req = &arm_class_reg_req_gp;
1799 
1800  verify_new_node(res);
1801  return optimize_node(res);
1802 }
1803 
1804 ir_node *new_bd_arm_Mov_reg(dbg_info *dbgi, ir_node *block, ir_node *Rm)
1805 {
1806  static arch_register_req_t const *in_reqs[] = {
1807  &arm_class_reg_req_gp,
1808  };
1809 
1810  /* construct in array */
1811  ir_node *const in[] = {
1812  Rm,
1813  };
1814 
1815  ir_graph *const irg = get_irn_irg(block);
1816  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mov, arm_mode_gp, 1, in);
1817 
1818  /* flags */
1819  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1820  irn_flags |= arch_irn_flag_rematerializable;
1821 
1822  /* init node attributes */
1823  int const n_res = 1;
1824  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1825  (void)attr; /* avoid potential warning */
1826  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1827  init_arm_shifter_operand(res, 0, 0, ARM_SHF_REG, 0);
1828  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1829  out_infos[0].req = &arm_class_reg_req_gp;
1830 
1831  verify_new_node(res);
1832  return optimize_node(res);
1833 }
1834 
1835 ir_node *new_bd_arm_Mov_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *Rm, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
1836 {
1837  static arch_register_req_t const *in_reqs[] = {
1838  &arm_class_reg_req_gp,
1839  };
1840 
1841  /* construct in array */
1842  ir_node *const in[] = {
1843  Rm,
1844  };
1845 
1846  ir_graph *const irg = get_irn_irg(block);
1847  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mov, arm_mode_gp, 1, in);
1848 
1849  /* flags */
1850  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1851  irn_flags |= arch_irn_flag_rematerializable;
1852 
1853  /* init node attributes */
1854  int const n_res = 1;
1855  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1856  (void)attr; /* avoid potential warning */
1857  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1858  init_arm_shifter_operand(res, 0, 0, shift_modifier, shift_immediate);
1859  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1860  out_infos[0].req = &arm_class_reg_req_gp;
1861 
1862  verify_new_node(res);
1863  return optimize_node(res);
1864 }
1865 
1866 ir_node *new_bd_arm_Mov_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *Rm, ir_node *Rs, arm_shift_modifier_t shift_modifier)
1867 {
1868  static arch_register_req_t const *in_reqs[] = {
1869  &arm_class_reg_req_gp,
1870  &arm_class_reg_req_gp,
1871  };
1872 
1873  /* construct in array */
1874  ir_node *const in[] = {
1875  Rm,
1876  Rs,
1877  };
1878 
1879  ir_graph *const irg = get_irn_irg(block);
1880  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mov, arm_mode_gp, 2, in);
1881 
1882  /* flags */
1883  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1884  irn_flags |= arch_irn_flag_rematerializable;
1885 
1886  /* init node attributes */
1887  int const n_res = 1;
1888  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
1889  (void)attr; /* avoid potential warning */
1890  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1891  init_arm_shifter_operand(res, 0, 0, shift_modifier, 0);
1892  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1893  out_infos[0].req = &arm_class_reg_req_gp;
1894 
1895  verify_new_node(res);
1896  return optimize_node(res);
1897 }
1898 
1899 ir_node *new_bd_arm_Muf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode)
1900 {
1901  static arch_register_req_t const *in_reqs[] = {
1902  &arm_class_reg_req_fpa,
1903  &arm_class_reg_req_fpa,
1904  };
1905 
1906  /* construct in array */
1907  ir_node *const in[] = {
1908  op0,
1909  op1,
1910  };
1911 
1912  ir_graph *const irg = get_irn_irg(block);
1913  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Muf, mode_F, 2, in);
1914 
1915  /* flags */
1916  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1917  irn_flags |= arch_irn_flag_rematerializable;
1918 
1919  /* init node attributes */
1920  int const n_res = 1;
1921  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
1922  (void)attr; /* avoid potential warning */
1923  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1924  init_arm_farith_attributes(res, op_mode);
1925  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1926  out_infos[0].req = &arm_class_reg_req_fpa;
1927 
1928  verify_new_node(res);
1929  return optimize_node(res);
1930 }
1931 
1932 ir_node *new_bd_arm_Mul(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1)
1933 {
1934  static arch_register_req_t const *in_reqs[] = {
1935  &arm_class_reg_req_gp,
1936  &arm_class_reg_req_gp,
1937  };
1938 
1939  /* construct in array */
1940  ir_node *const in[] = {
1941  op0,
1942  op1,
1943  };
1944 
1945  ir_graph *const irg = get_irn_irg(block);
1946  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mul, arm_mode_gp, 2, in);
1947 
1948  /* flags */
1949  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1950  irn_flags |= arch_irn_flag_rematerializable;
1951 
1952  /* init node attributes */
1953  int const n_res = 1;
1954  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
1955  (void)attr; /* avoid potential warning */
1956  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1957  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1958  out_infos[0].req = &arm_class_reg_req_gp;
1959 
1960  verify_new_node(res);
1961  return optimize_node(res);
1962 }
1963 
1964 ir_node *new_bd_arm_Mul_v5(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1)
1965 {
1966  static arch_register_req_t const *in_reqs[] = {
1967  &arm_class_reg_req_gp,
1968  &arm_class_reg_req_gp,
1969  };
1970 
1971  /* construct in array */
1972  ir_node *const in[] = {
1973  op0,
1974  op1,
1975  };
1976 
1977  ir_graph *const irg = get_irn_irg(block);
1978  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mul, arm_mode_gp, 2, in);
1979 
1980  /* flags */
1981  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1982  irn_flags |= arch_irn_flag_rematerializable;
1983 
1984  /* init node attributes */
1985  int const n_res = 1;
1986  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
1987  (void)attr; /* avoid potential warning */
1988  init_arm_attributes(res, irn_flags, in_reqs, n_res);
1989  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1990  out_infos[0].req = &arm_requirements_gp_not_in_r0;
1991 
1992  verify_new_node(res);
1993  return optimize_node(res);
1994 }
1995 
1996 ir_node *new_bd_arm_Mvf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_mode *op_mode)
1997 {
1998  static arch_register_req_t const *in_reqs[] = {
1999  &arm_class_reg_req_fpa,
2000  };
2001 
2002  /* construct in array */
2003  ir_node *const in[] = {
2004  op0,
2005  };
2006 
2007  ir_graph *const irg = get_irn_irg(block);
2008  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mvf, mode_F, 1, in);
2009 
2010  /* flags */
2011  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2012  irn_flags |= arch_irn_flag_rematerializable;
2013 
2014  /* init node attributes */
2015  int const n_res = 1;
2016  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
2017  (void)attr; /* avoid potential warning */
2018  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2019  init_arm_farith_attributes(res, op_mode);
2020  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2021  out_infos[0].req = &arm_class_reg_req_fpa;
2022 
2023  verify_new_node(res);
2024  return optimize_node(res);
2025 }
2026 
2027 ir_node *new_bd_arm_Mvn_imm(dbg_info *dbgi, ir_node *block, unsigned char immediate_value, unsigned char immediate_rot)
2028 {
2029  static arch_register_req_t const *in_reqs[] = {
2030  };
2031 
2032 
2033  ir_graph *const irg = get_irn_irg(block);
2034  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mvn, arm_mode_gp, 0, NULL);
2035 
2036  /* flags */
2037  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2038  irn_flags |= arch_irn_flag_rematerializable;
2039 
2040  /* init node attributes */
2041  int const n_res = 1;
2042  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2043  (void)attr; /* avoid potential warning */
2044  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2045  init_arm_shifter_operand(res, 0, immediate_value, ARM_SHF_IMM, immediate_rot);
2046  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2047  out_infos[0].req = &arm_class_reg_req_gp;
2048 
2049  verify_new_node(res);
2050  return optimize_node(res);
2051 }
2052 
2053 ir_node *new_bd_arm_Mvn_reg(dbg_info *dbgi, ir_node *block, ir_node *Rm)
2054 {
2055  static arch_register_req_t const *in_reqs[] = {
2056  &arm_class_reg_req_gp,
2057  };
2058 
2059  /* construct in array */
2060  ir_node *const in[] = {
2061  Rm,
2062  };
2063 
2064  ir_graph *const irg = get_irn_irg(block);
2065  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mvn, arm_mode_gp, 1, in);
2066 
2067  /* flags */
2068  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2069  irn_flags |= arch_irn_flag_rematerializable;
2070 
2071  /* init node attributes */
2072  int const n_res = 1;
2073  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2074  (void)attr; /* avoid potential warning */
2075  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2076  init_arm_shifter_operand(res, 0, 0, ARM_SHF_REG, 0);
2077  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2078  out_infos[0].req = &arm_class_reg_req_gp;
2079 
2080  verify_new_node(res);
2081  return optimize_node(res);
2082 }
2083 
2084 ir_node *new_bd_arm_Mvn_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *Rm, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2085 {
2086  static arch_register_req_t const *in_reqs[] = {
2087  &arm_class_reg_req_gp,
2088  };
2089 
2090  /* construct in array */
2091  ir_node *const in[] = {
2092  Rm,
2093  };
2094 
2095  ir_graph *const irg = get_irn_irg(block);
2096  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mvn, arm_mode_gp, 1, in);
2097 
2098  /* flags */
2099  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2100  irn_flags |= arch_irn_flag_rematerializable;
2101 
2102  /* init node attributes */
2103  int const n_res = 1;
2104  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2105  (void)attr; /* avoid potential warning */
2106  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2107  init_arm_shifter_operand(res, 0, 0, shift_modifier, shift_immediate);
2108  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2109  out_infos[0].req = &arm_class_reg_req_gp;
2110 
2111  verify_new_node(res);
2112  return optimize_node(res);
2113 }
2114 
2115 ir_node *new_bd_arm_Mvn_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *Rm, ir_node *Rs, arm_shift_modifier_t shift_modifier)
2116 {
2117  static arch_register_req_t const *in_reqs[] = {
2118  &arm_class_reg_req_gp,
2119  &arm_class_reg_req_gp,
2120  };
2121 
2122  /* construct in array */
2123  ir_node *const in[] = {
2124  Rm,
2125  Rs,
2126  };
2127 
2128  ir_graph *const irg = get_irn_irg(block);
2129  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Mvn, arm_mode_gp, 2, in);
2130 
2131  /* flags */
2132  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2133  irn_flags |= arch_irn_flag_rematerializable;
2134 
2135  /* init node attributes */
2136  int const n_res = 1;
2137  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2138  (void)attr; /* avoid potential warning */
2139  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2140  init_arm_shifter_operand(res, 0, 0, shift_modifier, 0);
2141  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2142  out_infos[0].req = &arm_class_reg_req_gp;
2143 
2144  verify_new_node(res);
2145  return optimize_node(res);
2146 }
2147 
2148 ir_node *new_bd_arm_OrPl_t(dbg_info *dbgi, ir_node *block, ir_node *falseval, ir_node *flags, ir_node *left, ir_node *right, ir_mode *mode)
2149 {
2150 
2151  /* construct in array */
2152  ir_node *const in[] = {
2153  falseval,
2154  flags,
2155  left,
2156  right,
2157  };
2158 
2159  ir_graph *const irg = get_irn_irg(block);
2160  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_OrPl_t, mode, 4, in);
2161 
2162  /* flags */
2163  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2164 
2165  /* init node attributes */
2166  int const n_res = 0;
2167  (void)irn_flags, (void)n_res;
2168 
2169  verify_new_node(res);
2170  return optimize_node(res);
2171 }
2172 
2173 ir_node *new_bd_arm_Orr_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
2174 {
2175  static arch_register_req_t const *in_reqs[] = {
2176  &arm_class_reg_req_gp,
2177  };
2178 
2179  /* construct in array */
2180  ir_node *const in[] = {
2181  left,
2182  };
2183 
2184  ir_graph *const irg = get_irn_irg(block);
2185  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Orr, arm_mode_gp, 1, in);
2186 
2187  /* flags */
2188  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2189  irn_flags |= arch_irn_flag_rematerializable;
2190 
2191  /* init node attributes */
2192  int const n_res = 1;
2193  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2194  (void)attr; /* avoid potential warning */
2195  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2196  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2197  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2198  out_infos[0].req = &arm_class_reg_req_gp;
2199 
2200  verify_new_node(res);
2201  return optimize_node(res);
2202 }
2203 
2204 ir_node *new_bd_arm_Orr_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
2205 {
2206  static arch_register_req_t const *in_reqs[] = {
2207  &arm_class_reg_req_gp,
2208  &arm_class_reg_req_gp,
2209  };
2210 
2211  /* construct in array */
2212  ir_node *const in[] = {
2213  left,
2214  right,
2215  };
2216 
2217  ir_graph *const irg = get_irn_irg(block);
2218  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Orr, arm_mode_gp, 2, in);
2219 
2220  /* flags */
2221  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2222  irn_flags |= arch_irn_flag_rematerializable;
2223 
2224  /* init node attributes */
2225  int const n_res = 1;
2226  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2227  (void)attr; /* avoid potential warning */
2228  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2229  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2230  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2231  out_infos[0].req = &arm_class_reg_req_gp;
2232 
2233  verify_new_node(res);
2234  return optimize_node(res);
2235 }
2236 
2237 ir_node *new_bd_arm_Orr_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2238 {
2239  static arch_register_req_t const *in_reqs[] = {
2240  &arm_class_reg_req_gp,
2241  &arm_class_reg_req_gp,
2242  };
2243 
2244  /* construct in array */
2245  ir_node *const in[] = {
2246  left,
2247  right,
2248  };
2249 
2250  ir_graph *const irg = get_irn_irg(block);
2251  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Orr, arm_mode_gp, 2, in);
2252 
2253  /* flags */
2254  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2255  irn_flags |= arch_irn_flag_rematerializable;
2256 
2257  /* init node attributes */
2258  int const n_res = 1;
2259  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2260  (void)attr; /* avoid potential warning */
2261  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2262  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2263  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2264  out_infos[0].req = &arm_class_reg_req_gp;
2265 
2266  verify_new_node(res);
2267  return optimize_node(res);
2268 }
2269 
2270 ir_node *new_bd_arm_Orr_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
2271 {
2272  static arch_register_req_t const *in_reqs[] = {
2273  &arm_class_reg_req_gp,
2274  &arm_class_reg_req_gp,
2275  &arm_class_reg_req_gp,
2276  };
2277 
2278  /* construct in array */
2279  ir_node *const in[] = {
2280  left,
2281  right,
2282  shift,
2283  };
2284 
2285  ir_graph *const irg = get_irn_irg(block);
2286  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Orr, arm_mode_gp, 3, in);
2287 
2288  /* flags */
2289  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2290  irn_flags |= arch_irn_flag_rematerializable;
2291 
2292  /* init node attributes */
2293  int const n_res = 1;
2294  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2295  (void)attr; /* avoid potential warning */
2296  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2297  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2298  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2299  out_infos[0].req = &arm_class_reg_req_gp;
2300 
2301  verify_new_node(res);
2302  return optimize_node(res);
2303 }
2304 
2305 ir_node *new_bd_arm_OrrPl(dbg_info *dbgi, ir_node *block, ir_node *falseval, ir_node *flags, ir_node *left, ir_node *right)
2306 {
2307  static arch_register_req_t const *in_reqs[] = {
2308  &arm_class_reg_req_gp,
2309  &arm_class_reg_req_flags,
2310  &arm_class_reg_req_gp,
2311  &arm_class_reg_req_gp,
2312  };
2313 
2314  /* construct in array */
2315  ir_node *const in[] = {
2316  falseval,
2317  flags,
2318  left,
2319  right,
2320  };
2321 
2322  ir_graph *const irg = get_irn_irg(block);
2323  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_OrrPl, arm_mode_gp, 4, in);
2324 
2325  /* flags */
2326  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2327 
2328  /* init node attributes */
2329  int const n_res = 1;
2330  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2331  (void)attr; /* avoid potential warning */
2332  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2333  init_arm_shifter_operand(res, 3, 0, ARM_SHF_REG, 0);
2334  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2335  out_infos[0].req = &arm_requirements_gp_in_r2;
2336 
2337  verify_new_node(res);
2338  return optimize_node(res);
2339 }
2340 
2341 ir_node *new_bd_arm_Pkhbt_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
2342 {
2343  static arch_register_req_t const *in_reqs[] = {
2344  &arm_class_reg_req_gp,
2345  };
2346 
2347  /* construct in array */
2348  ir_node *const in[] = {
2349  left,
2350  };
2351 
2352  ir_graph *const irg = get_irn_irg(block);
2353  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 1, in);
2354 
2355  /* flags */
2356  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2357  irn_flags |= arch_irn_flag_rematerializable;
2358 
2359  /* init node attributes */
2360  int const n_res = 1;
2361  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2362  (void)attr; /* avoid potential warning */
2363  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2364  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2365  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2366  out_infos[0].req = &arm_class_reg_req_gp;
2367 
2368  verify_new_node(res);
2369  return optimize_node(res);
2370 }
2371 
2372 ir_node *new_bd_arm_Pkhbt_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
2373 {
2374  static arch_register_req_t const *in_reqs[] = {
2375  &arm_class_reg_req_gp,
2376  &arm_class_reg_req_gp,
2377  };
2378 
2379  /* construct in array */
2380  ir_node *const in[] = {
2381  left,
2382  right,
2383  };
2384 
2385  ir_graph *const irg = get_irn_irg(block);
2386  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 2, in);
2387 
2388  /* flags */
2389  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2390  irn_flags |= arch_irn_flag_rematerializable;
2391 
2392  /* init node attributes */
2393  int const n_res = 1;
2394  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2395  (void)attr; /* avoid potential warning */
2396  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2397  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2398  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2399  out_infos[0].req = &arm_class_reg_req_gp;
2400 
2401  verify_new_node(res);
2402  return optimize_node(res);
2403 }
2404 
2405 ir_node *new_bd_arm_Pkhbt_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2406 {
2407  static arch_register_req_t const *in_reqs[] = {
2408  &arm_class_reg_req_gp,
2409  &arm_class_reg_req_gp,
2410  };
2411 
2412  /* construct in array */
2413  ir_node *const in[] = {
2414  left,
2415  right,
2416  };
2417 
2418  ir_graph *const irg = get_irn_irg(block);
2419  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 2, in);
2420 
2421  /* flags */
2422  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2423  irn_flags |= arch_irn_flag_rematerializable;
2424 
2425  /* init node attributes */
2426  int const n_res = 1;
2427  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2428  (void)attr; /* avoid potential warning */
2429  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2430  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2431  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2432  out_infos[0].req = &arm_class_reg_req_gp;
2433 
2434  verify_new_node(res);
2435  return optimize_node(res);
2436 }
2437 
2438 ir_node *new_bd_arm_Pkhbt_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
2439 {
2440  static arch_register_req_t const *in_reqs[] = {
2441  &arm_class_reg_req_gp,
2442  &arm_class_reg_req_gp,
2443  &arm_class_reg_req_gp,
2444  };
2445 
2446  /* construct in array */
2447  ir_node *const in[] = {
2448  left,
2449  right,
2450  shift,
2451  };
2452 
2453  ir_graph *const irg = get_irn_irg(block);
2454  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhbt, arm_mode_gp, 3, in);
2455 
2456  /* flags */
2457  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2458  irn_flags |= arch_irn_flag_rematerializable;
2459 
2460  /* init node attributes */
2461  int const n_res = 1;
2462  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2463  (void)attr; /* avoid potential warning */
2464  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2465  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2466  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2467  out_infos[0].req = &arm_class_reg_req_gp;
2468 
2469  verify_new_node(res);
2470  return optimize_node(res);
2471 }
2472 
2473 ir_node *new_bd_arm_Pkhtb_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
2474 {
2475  static arch_register_req_t const *in_reqs[] = {
2476  &arm_class_reg_req_gp,
2477  };
2478 
2479  /* construct in array */
2480  ir_node *const in[] = {
2481  left,
2482  };
2483 
2484  ir_graph *const irg = get_irn_irg(block);
2485  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 1, in);
2486 
2487  /* flags */
2488  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2489  irn_flags |= arch_irn_flag_rematerializable;
2490 
2491  /* init node attributes */
2492  int const n_res = 1;
2493  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2494  (void)attr; /* avoid potential warning */
2495  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2496  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2497  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2498  out_infos[0].req = &arm_class_reg_req_gp;
2499 
2500  verify_new_node(res);
2501  return optimize_node(res);
2502 }
2503 
2504 ir_node *new_bd_arm_Pkhtb_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
2505 {
2506  static arch_register_req_t const *in_reqs[] = {
2507  &arm_class_reg_req_gp,
2508  &arm_class_reg_req_gp,
2509  };
2510 
2511  /* construct in array */
2512  ir_node *const in[] = {
2513  left,
2514  right,
2515  };
2516 
2517  ir_graph *const irg = get_irn_irg(block);
2518  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 2, in);
2519 
2520  /* flags */
2521  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2522  irn_flags |= arch_irn_flag_rematerializable;
2523 
2524  /* init node attributes */
2525  int const n_res = 1;
2526  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2527  (void)attr; /* avoid potential warning */
2528  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2529  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2530  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2531  out_infos[0].req = &arm_class_reg_req_gp;
2532 
2533  verify_new_node(res);
2534  return optimize_node(res);
2535 }
2536 
2537 ir_node *new_bd_arm_Pkhtb_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2538 {
2539  static arch_register_req_t const *in_reqs[] = {
2540  &arm_class_reg_req_gp,
2541  &arm_class_reg_req_gp,
2542  };
2543 
2544  /* construct in array */
2545  ir_node *const in[] = {
2546  left,
2547  right,
2548  };
2549 
2550  ir_graph *const irg = get_irn_irg(block);
2551  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 2, in);
2552 
2553  /* flags */
2554  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2555  irn_flags |= arch_irn_flag_rematerializable;
2556 
2557  /* init node attributes */
2558  int const n_res = 1;
2559  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2560  (void)attr; /* avoid potential warning */
2561  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2562  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2563  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2564  out_infos[0].req = &arm_class_reg_req_gp;
2565 
2566  verify_new_node(res);
2567  return optimize_node(res);
2568 }
2569 
2570 ir_node *new_bd_arm_Pkhtb_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
2571 {
2572  static arch_register_req_t const *in_reqs[] = {
2573  &arm_class_reg_req_gp,
2574  &arm_class_reg_req_gp,
2575  &arm_class_reg_req_gp,
2576  };
2577 
2578  /* construct in array */
2579  ir_node *const in[] = {
2580  left,
2581  right,
2582  shift,
2583  };
2584 
2585  ir_graph *const irg = get_irn_irg(block);
2586  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Pkhtb, arm_mode_gp, 3, in);
2587 
2588  /* flags */
2589  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2590  irn_flags |= arch_irn_flag_rematerializable;
2591 
2592  /* init node attributes */
2593  int const n_res = 1;
2594  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2595  (void)attr; /* avoid potential warning */
2596  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2597  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2598  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2599  out_infos[0].req = &arm_class_reg_req_gp;
2600 
2601  verify_new_node(res);
2602  return optimize_node(res);
2603 }
2604 
2605 ir_node *new_bd_arm_Return(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs)
2606 {
2607 
2608 
2609  ir_graph *const irg = get_irn_irg(block);
2610  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Return, mode_X, arity, in);
2611 
2612  /* flags */
2613  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2614 
2615  /* init node attributes */
2616  int const n_res = 1;
2617  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
2618  (void)attr; /* avoid potential warning */
2619  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2620  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2621  out_infos[0].req = &arch_exec_requirement;
2622 
2623  verify_new_node(res);
2624  return optimize_node(res);
2625 }
2626 
2627 ir_node *new_bd_arm_RsC_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *flags, unsigned char immediate_value, unsigned char immediate_rot)
2628 {
2629  static arch_register_req_t const *in_reqs[] = {
2630  &arm_class_reg_req_gp,
2631  &arm_class_reg_req_flags,
2632  };
2633 
2634  /* construct in array */
2635  ir_node *const in[] = {
2636  left,
2637  flags,
2638  };
2639 
2640  ir_graph *const irg = get_irn_irg(block);
2641  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsC, arm_mode_gp, 2, in);
2642 
2643  /* flags */
2644  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2645 
2646  /* init node attributes */
2647  int const n_res = 1;
2648  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2649  (void)attr; /* avoid potential warning */
2650  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2651  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2652  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2653  out_infos[0].req = &arm_class_reg_req_gp;
2654 
2655  verify_new_node(res);
2656  return optimize_node(res);
2657 }
2658 
2659 ir_node *new_bd_arm_RsC_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags)
2660 {
2661  static arch_register_req_t const *in_reqs[] = {
2662  &arm_class_reg_req_gp,
2663  &arm_class_reg_req_gp,
2664  &arm_class_reg_req_flags,
2665  };
2666 
2667  /* construct in array */
2668  ir_node *const in[] = {
2669  left,
2670  right,
2671  flags,
2672  };
2673 
2674  ir_graph *const irg = get_irn_irg(block);
2675  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsC, arm_mode_gp, 3, in);
2676 
2677  /* flags */
2678  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2679 
2680  /* init node attributes */
2681  int const n_res = 1;
2682  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2683  (void)attr; /* avoid potential warning */
2684  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2685  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2686  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2687  out_infos[0].req = &arm_class_reg_req_gp;
2688 
2689  verify_new_node(res);
2690  return optimize_node(res);
2691 }
2692 
2693 ir_node *new_bd_arm_RsC_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2694 {
2695  static arch_register_req_t const *in_reqs[] = {
2696  &arm_class_reg_req_gp,
2697  &arm_class_reg_req_gp,
2698  &arm_class_reg_req_flags,
2699  };
2700 
2701  /* construct in array */
2702  ir_node *const in[] = {
2703  left,
2704  right,
2705  flags,
2706  };
2707 
2708  ir_graph *const irg = get_irn_irg(block);
2709  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsC, arm_mode_gp, 3, in);
2710 
2711  /* flags */
2712  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2713 
2714  /* init node attributes */
2715  int const n_res = 1;
2716  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2717  (void)attr; /* avoid potential warning */
2718  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2719  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2720  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2721  out_infos[0].req = &arm_class_reg_req_gp;
2722 
2723  verify_new_node(res);
2724  return optimize_node(res);
2725 }
2726 
2727 ir_node *new_bd_arm_RsC_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, ir_node *flags, arm_shift_modifier_t shift_modifier)
2728 {
2729  static arch_register_req_t const *in_reqs[] = {
2730  &arm_class_reg_req_gp,
2731  &arm_class_reg_req_gp,
2732  &arm_class_reg_req_gp,
2733  &arm_class_reg_req_flags,
2734  };
2735 
2736  /* construct in array */
2737  ir_node *const in[] = {
2738  left,
2739  right,
2740  shift,
2741  flags,
2742  };
2743 
2744  ir_graph *const irg = get_irn_irg(block);
2745  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsC, arm_mode_gp, 4, in);
2746 
2747  /* flags */
2748  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2749 
2750  /* init node attributes */
2751  int const n_res = 1;
2752  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2753  (void)attr; /* avoid potential warning */
2754  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2755  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2756  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2757  out_infos[0].req = &arm_class_reg_req_gp;
2758 
2759  verify_new_node(res);
2760  return optimize_node(res);
2761 }
2762 
2763 ir_node *new_bd_arm_Rsb_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
2764 {
2765  static arch_register_req_t const *in_reqs[] = {
2766  &arm_class_reg_req_gp,
2767  };
2768 
2769  /* construct in array */
2770  ir_node *const in[] = {
2771  left,
2772  };
2773 
2774  ir_graph *const irg = get_irn_irg(block);
2775  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Rsb, arm_mode_gp, 1, in);
2776 
2777  /* flags */
2778  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2779  irn_flags |= arch_irn_flag_rematerializable;
2780 
2781  /* init node attributes */
2782  int const n_res = 1;
2783  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2784  (void)attr; /* avoid potential warning */
2785  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2786  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2787  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2788  out_infos[0].req = &arm_class_reg_req_gp;
2789 
2790  verify_new_node(res);
2791  return optimize_node(res);
2792 }
2793 
2794 ir_node *new_bd_arm_Rsb_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
2795 {
2796  static arch_register_req_t const *in_reqs[] = {
2797  &arm_class_reg_req_gp,
2798  &arm_class_reg_req_gp,
2799  };
2800 
2801  /* construct in array */
2802  ir_node *const in[] = {
2803  left,
2804  right,
2805  };
2806 
2807  ir_graph *const irg = get_irn_irg(block);
2808  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Rsb, arm_mode_gp, 2, in);
2809 
2810  /* flags */
2811  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2812  irn_flags |= arch_irn_flag_rematerializable;
2813 
2814  /* init node attributes */
2815  int const n_res = 1;
2816  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2817  (void)attr; /* avoid potential warning */
2818  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2819  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2820  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2821  out_infos[0].req = &arm_class_reg_req_gp;
2822 
2823  verify_new_node(res);
2824  return optimize_node(res);
2825 }
2826 
2827 ir_node *new_bd_arm_Rsb_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2828 {
2829  static arch_register_req_t const *in_reqs[] = {
2830  &arm_class_reg_req_gp,
2831  &arm_class_reg_req_gp,
2832  };
2833 
2834  /* construct in array */
2835  ir_node *const in[] = {
2836  left,
2837  right,
2838  };
2839 
2840  ir_graph *const irg = get_irn_irg(block);
2841  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Rsb, arm_mode_gp, 2, in);
2842 
2843  /* flags */
2844  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2845  irn_flags |= arch_irn_flag_rematerializable;
2846 
2847  /* init node attributes */
2848  int const n_res = 1;
2849  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2850  (void)attr; /* avoid potential warning */
2851  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2852  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2853  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2854  out_infos[0].req = &arm_class_reg_req_gp;
2855 
2856  verify_new_node(res);
2857  return optimize_node(res);
2858 }
2859 
2860 ir_node *new_bd_arm_Rsb_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
2861 {
2862  static arch_register_req_t const *in_reqs[] = {
2863  &arm_class_reg_req_gp,
2864  &arm_class_reg_req_gp,
2865  &arm_class_reg_req_gp,
2866  };
2867 
2868  /* construct in array */
2869  ir_node *const in[] = {
2870  left,
2871  right,
2872  shift,
2873  };
2874 
2875  ir_graph *const irg = get_irn_irg(block);
2876  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Rsb, arm_mode_gp, 3, in);
2877 
2878  /* flags */
2879  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2880  irn_flags |= arch_irn_flag_rematerializable;
2881 
2882  /* init node attributes */
2883  int const n_res = 1;
2884  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2885  (void)attr; /* avoid potential warning */
2886  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2887  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
2888  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2889  out_infos[0].req = &arm_class_reg_req_gp;
2890 
2891  verify_new_node(res);
2892  return optimize_node(res);
2893 }
2894 
2895 ir_node *new_bd_arm_RsbS_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
2896 {
2897  static arch_register_req_t const *in_reqs[] = {
2898  &arm_class_reg_req_gp,
2899  };
2900 
2901  /* construct in array */
2902  ir_node *const in[] = {
2903  left,
2904  };
2905 
2906  ir_graph *const irg = get_irn_irg(block);
2907  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsbS, mode_T, 1, in);
2908 
2909  /* flags */
2910  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2911  irn_flags |= arch_irn_flag_modify_flags;
2912  irn_flags |= arch_irn_flag_rematerializable;
2913 
2914  /* init node attributes */
2915  int const n_res = 2;
2916  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2917  (void)attr; /* avoid potential warning */
2918  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2919  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
2920  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2921  out_infos[0].req = &arm_class_reg_req_gp;
2922  out_infos[1].req = &arm_class_reg_req_flags;
2923 
2924  verify_new_node(res);
2925  return optimize_node(res);
2926 }
2927 
2928 ir_node *new_bd_arm_RsbS_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
2929 {
2930  static arch_register_req_t const *in_reqs[] = {
2931  &arm_class_reg_req_gp,
2932  &arm_class_reg_req_gp,
2933  };
2934 
2935  /* construct in array */
2936  ir_node *const in[] = {
2937  left,
2938  right,
2939  };
2940 
2941  ir_graph *const irg = get_irn_irg(block);
2942  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsbS, mode_T, 2, in);
2943 
2944  /* flags */
2945  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2946  irn_flags |= arch_irn_flag_modify_flags;
2947  irn_flags |= arch_irn_flag_rematerializable;
2948 
2949  /* init node attributes */
2950  int const n_res = 2;
2951  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2952  (void)attr; /* avoid potential warning */
2953  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2954  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
2955  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2956  out_infos[0].req = &arm_class_reg_req_gp;
2957  out_infos[1].req = &arm_class_reg_req_flags;
2958 
2959  verify_new_node(res);
2960  return optimize_node(res);
2961 }
2962 
2963 ir_node *new_bd_arm_RsbS_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
2964 {
2965  static arch_register_req_t const *in_reqs[] = {
2966  &arm_class_reg_req_gp,
2967  &arm_class_reg_req_gp,
2968  };
2969 
2970  /* construct in array */
2971  ir_node *const in[] = {
2972  left,
2973  right,
2974  };
2975 
2976  ir_graph *const irg = get_irn_irg(block);
2977  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsbS, mode_T, 2, in);
2978 
2979  /* flags */
2980  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2981  irn_flags |= arch_irn_flag_modify_flags;
2982  irn_flags |= arch_irn_flag_rematerializable;
2983 
2984  /* init node attributes */
2985  int const n_res = 2;
2986  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
2987  (void)attr; /* avoid potential warning */
2988  init_arm_attributes(res, irn_flags, in_reqs, n_res);
2989  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
2990  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2991  out_infos[0].req = &arm_class_reg_req_gp;
2992  out_infos[1].req = &arm_class_reg_req_flags;
2993 
2994  verify_new_node(res);
2995  return optimize_node(res);
2996 }
2997 
2998 ir_node *new_bd_arm_RsbS_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
2999 {
3000  static arch_register_req_t const *in_reqs[] = {
3001  &arm_class_reg_req_gp,
3002  &arm_class_reg_req_gp,
3003  &arm_class_reg_req_gp,
3004  };
3005 
3006  /* construct in array */
3007  ir_node *const in[] = {
3008  left,
3009  right,
3010  shift,
3011  };
3012 
3013  ir_graph *const irg = get_irn_irg(block);
3014  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_RsbS, mode_T, 3, in);
3015 
3016  /* flags */
3017  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3018  irn_flags |= arch_irn_flag_modify_flags;
3019  irn_flags |= arch_irn_flag_rematerializable;
3020 
3021  /* init node attributes */
3022  int const n_res = 2;
3023  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3024  (void)attr; /* avoid potential warning */
3025  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3026  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3027  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3028  out_infos[0].req = &arm_class_reg_req_gp;
3029  out_infos[1].req = &arm_class_reg_req_flags;
3030 
3031  verify_new_node(res);
3032  return optimize_node(res);
3033 }
3034 
3035 ir_node *new_bd_arm_SMulL(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1)
3036 {
3037  static arch_register_req_t const *in_reqs[] = {
3038  &arm_class_reg_req_gp,
3039  &arm_class_reg_req_gp,
3040  };
3041 
3042  /* construct in array */
3043  ir_node *const in[] = {
3044  op0,
3045  op1,
3046  };
3047 
3048  ir_graph *const irg = get_irn_irg(block);
3049  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SMulL, mode_T, 2, in);
3050 
3051  /* flags */
3052  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3053  irn_flags |= arch_irn_flag_rematerializable;
3054 
3055  /* init node attributes */
3056  int const n_res = 2;
3057  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
3058  (void)attr; /* avoid potential warning */
3059  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3060  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3061  out_infos[0].req = &arm_class_reg_req_gp;
3062  out_infos[1].req = &arm_class_reg_req_gp;
3063 
3064  verify_new_node(res);
3065  return optimize_node(res);
3066 }
3067 
3068 ir_node *new_bd_arm_SMulL_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
3069 {
3070 
3071  /* construct in array */
3072  ir_node *const in[] = {
3073  left,
3074  right,
3075  };
3076 
3077  ir_graph *const irg = get_irn_irg(block);
3078  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SMulL_t, mode_T, 2, in);
3079 
3080  /* flags */
3081  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3082 
3083  /* init node attributes */
3084  int const n_res = 2;
3085  (void)irn_flags, (void)n_res;
3086 
3087  verify_new_node(res);
3088  return optimize_node(res);
3089 }
3090 
3091 ir_node *new_bd_arm_SbC_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *flags, unsigned char immediate_value, unsigned char immediate_rot)
3092 {
3093  static arch_register_req_t const *in_reqs[] = {
3094  &arm_class_reg_req_gp,
3095  &arm_class_reg_req_flags,
3096  };
3097 
3098  /* construct in array */
3099  ir_node *const in[] = {
3100  left,
3101  flags,
3102  };
3103 
3104  ir_graph *const irg = get_irn_irg(block);
3105  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SbC, arm_mode_gp, 2, in);
3106 
3107  /* flags */
3108  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3109 
3110  /* init node attributes */
3111  int const n_res = 1;
3112  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3113  (void)attr; /* avoid potential warning */
3114  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3115  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3116  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3117  out_infos[0].req = &arm_class_reg_req_gp;
3118 
3119  verify_new_node(res);
3120  return optimize_node(res);
3121 }
3122 
3123 ir_node *new_bd_arm_SbC_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags)
3124 {
3125  static arch_register_req_t const *in_reqs[] = {
3126  &arm_class_reg_req_gp,
3127  &arm_class_reg_req_gp,
3128  &arm_class_reg_req_flags,
3129  };
3130 
3131  /* construct in array */
3132  ir_node *const in[] = {
3133  left,
3134  right,
3135  flags,
3136  };
3137 
3138  ir_graph *const irg = get_irn_irg(block);
3139  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SbC, arm_mode_gp, 3, in);
3140 
3141  /* flags */
3142  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3143 
3144  /* init node attributes */
3145  int const n_res = 1;
3146  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3147  (void)attr; /* avoid potential warning */
3148  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3149  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3150  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3151  out_infos[0].req = &arm_class_reg_req_gp;
3152 
3153  verify_new_node(res);
3154  return optimize_node(res);
3155 }
3156 
3157 ir_node *new_bd_arm_SbC_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
3158 {
3159  static arch_register_req_t const *in_reqs[] = {
3160  &arm_class_reg_req_gp,
3161  &arm_class_reg_req_gp,
3162  &arm_class_reg_req_flags,
3163  };
3164 
3165  /* construct in array */
3166  ir_node *const in[] = {
3167  left,
3168  right,
3169  flags,
3170  };
3171 
3172  ir_graph *const irg = get_irn_irg(block);
3173  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SbC, arm_mode_gp, 3, in);
3174 
3175  /* flags */
3176  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3177 
3178  /* init node attributes */
3179  int const n_res = 1;
3180  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3181  (void)attr; /* avoid potential warning */
3182  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3183  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3184  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3185  out_infos[0].req = &arm_class_reg_req_gp;
3186 
3187  verify_new_node(res);
3188  return optimize_node(res);
3189 }
3190 
3191 ir_node *new_bd_arm_SbC_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, ir_node *flags, arm_shift_modifier_t shift_modifier)
3192 {
3193  static arch_register_req_t const *in_reqs[] = {
3194  &arm_class_reg_req_gp,
3195  &arm_class_reg_req_gp,
3196  &arm_class_reg_req_gp,
3197  &arm_class_reg_req_flags,
3198  };
3199 
3200  /* construct in array */
3201  ir_node *const in[] = {
3202  left,
3203  right,
3204  shift,
3205  flags,
3206  };
3207 
3208  ir_graph *const irg = get_irn_irg(block);
3209  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SbC, arm_mode_gp, 4, in);
3210 
3211  /* flags */
3212  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3213 
3214  /* init node attributes */
3215  int const n_res = 1;
3216  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3217  (void)attr; /* avoid potential warning */
3218  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3219  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3220  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3221  out_infos[0].req = &arm_class_reg_req_gp;
3222 
3223  verify_new_node(res);
3224  return optimize_node(res);
3225 }
3226 
3227 ir_node *new_bd_arm_SbC_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *flags, ir_mode *mode)
3228 {
3229 
3230  /* construct in array */
3231  ir_node *const in[] = {
3232  left,
3233  right,
3234  flags,
3235  };
3236 
3237  ir_graph *const irg = get_irn_irg(block);
3238  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SbC_t, mode, 3, in);
3239 
3240  /* flags */
3241  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3242 
3243  /* init node attributes */
3244  int const n_res = 0;
3245  (void)irn_flags, (void)n_res;
3246 
3247  verify_new_node(res);
3248  return optimize_node(res);
3249 }
3250 
3251 ir_node *new_bd_arm_Stf(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *val, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity)
3252 {
3253  static arch_register_req_t const *in_reqs[] = {
3254  &arm_class_reg_req_gp,
3255  &arm_class_reg_req_fpa,
3256  &arch_memory_requirement,
3257  };
3258 
3259  /* construct in array */
3260  ir_node *const in[] = {
3261  ptr,
3262  val,
3263  mem,
3264  };
3265 
3266  ir_graph *const irg = get_irn_irg(block);
3267  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Stf, mode_M, 3, in);
3268 
3269  /* flags */
3270  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3271 
3272  /* init node attributes */
3273  int const n_res = 1;
3274  arm_load_store_attr_t *const attr = (arm_load_store_attr_t*)get_irn_generic_attr(res);
3275  (void)attr; /* avoid potential warning */
3276  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3277  init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
3278  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3279  out_infos[0].req = &arch_memory_requirement;
3280 
3281  verify_new_node(res);
3282  return optimize_node(res);
3283 }
3284 
3285 ir_node *new_bd_arm_Str(dbg_info *dbgi, ir_node *block, ir_node *ptr, ir_node *val, ir_node *mem, ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity)
3286 {
3287  static arch_register_req_t const *in_reqs[] = {
3288  &arm_class_reg_req_gp,
3289  &arm_class_reg_req_gp,
3290  &arch_memory_requirement,
3291  };
3292 
3293  /* construct in array */
3294  ir_node *const in[] = {
3295  ptr,
3296  val,
3297  mem,
3298  };
3299 
3300  ir_graph *const irg = get_irn_irg(block);
3301  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Str, mode_M, 3, in);
3302 
3303  /* flags */
3304  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3305 
3306  /* init node attributes */
3307  int const n_res = 1;
3308  arm_load_store_attr_t *const attr = (arm_load_store_attr_t*)get_irn_generic_attr(res);
3309  (void)attr; /* avoid potential warning */
3310  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3311  init_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);
3312  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3313  out_infos[0].req = &arch_memory_requirement;
3314 
3315  verify_new_node(res);
3316  return optimize_node(res);
3317 }
3318 
3319 ir_node *new_bd_arm_Sub_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
3320 {
3321  static arch_register_req_t const *in_reqs[] = {
3322  &arm_class_reg_req_gp,
3323  };
3324 
3325  /* construct in array */
3326  ir_node *const in[] = {
3327  left,
3328  };
3329 
3330  ir_graph *const irg = get_irn_irg(block);
3331  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Sub, arm_mode_gp, 1, in);
3332 
3333  /* flags */
3334  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3335  irn_flags |= arch_irn_flag_rematerializable;
3336 
3337  /* init node attributes */
3338  int const n_res = 1;
3339  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3340  (void)attr; /* avoid potential warning */
3341  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3342  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3343  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3344  out_infos[0].req = &arm_class_reg_req_gp;
3345 
3346  verify_new_node(res);
3347  return optimize_node(res);
3348 }
3349 
3350 ir_node *new_bd_arm_Sub_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
3351 {
3352  static arch_register_req_t const *in_reqs[] = {
3353  &arm_class_reg_req_gp,
3354  &arm_class_reg_req_gp,
3355  };
3356 
3357  /* construct in array */
3358  ir_node *const in[] = {
3359  left,
3360  right,
3361  };
3362 
3363  ir_graph *const irg = get_irn_irg(block);
3364  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Sub, arm_mode_gp, 2, in);
3365 
3366  /* flags */
3367  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3368  irn_flags |= arch_irn_flag_rematerializable;
3369 
3370  /* init node attributes */
3371  int const n_res = 1;
3372  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3373  (void)attr; /* avoid potential warning */
3374  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3375  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3376  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3377  out_infos[0].req = &arm_class_reg_req_gp;
3378 
3379  verify_new_node(res);
3380  return optimize_node(res);
3381 }
3382 
3383 ir_node *new_bd_arm_Sub_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
3384 {
3385  static arch_register_req_t const *in_reqs[] = {
3386  &arm_class_reg_req_gp,
3387  &arm_class_reg_req_gp,
3388  };
3389 
3390  /* construct in array */
3391  ir_node *const in[] = {
3392  left,
3393  right,
3394  };
3395 
3396  ir_graph *const irg = get_irn_irg(block);
3397  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Sub, arm_mode_gp, 2, in);
3398 
3399  /* flags */
3400  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3401  irn_flags |= arch_irn_flag_rematerializable;
3402 
3403  /* init node attributes */
3404  int const n_res = 1;
3405  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3406  (void)attr; /* avoid potential warning */
3407  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3408  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3409  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3410  out_infos[0].req = &arm_class_reg_req_gp;
3411 
3412  verify_new_node(res);
3413  return optimize_node(res);
3414 }
3415 
3416 ir_node *new_bd_arm_Sub_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
3417 {
3418  static arch_register_req_t const *in_reqs[] = {
3419  &arm_class_reg_req_gp,
3420  &arm_class_reg_req_gp,
3421  &arm_class_reg_req_gp,
3422  };
3423 
3424  /* construct in array */
3425  ir_node *const in[] = {
3426  left,
3427  right,
3428  shift,
3429  };
3430 
3431  ir_graph *const irg = get_irn_irg(block);
3432  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Sub, arm_mode_gp, 3, in);
3433 
3434  /* flags */
3435  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3436  irn_flags |= arch_irn_flag_rematerializable;
3437 
3438  /* init node attributes */
3439  int const n_res = 1;
3440  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3441  (void)attr; /* avoid potential warning */
3442  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3443  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3444  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3445  out_infos[0].req = &arm_class_reg_req_gp;
3446 
3447  verify_new_node(res);
3448  return optimize_node(res);
3449 }
3450 
3451 ir_node *new_bd_arm_SubS_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot)
3452 {
3453  static arch_register_req_t const *in_reqs[] = {
3454  &arm_class_reg_req_gp,
3455  };
3456 
3457  /* construct in array */
3458  ir_node *const in[] = {
3459  left,
3460  };
3461 
3462  ir_graph *const irg = get_irn_irg(block);
3463  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SubS, mode_T, 1, in);
3464 
3465  /* flags */
3466  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3467  irn_flags |= arch_irn_flag_modify_flags;
3468  irn_flags |= arch_irn_flag_rematerializable;
3469 
3470  /* init node attributes */
3471  int const n_res = 2;
3472  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3473  (void)attr; /* avoid potential warning */
3474  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3475  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3476  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3477  out_infos[0].req = &arm_class_reg_req_gp;
3478  out_infos[1].req = &arm_class_reg_req_flags;
3479 
3480  verify_new_node(res);
3481  return optimize_node(res);
3482 }
3483 
3484 ir_node *new_bd_arm_SubS_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
3485 {
3486  static arch_register_req_t const *in_reqs[] = {
3487  &arm_class_reg_req_gp,
3488  &arm_class_reg_req_gp,
3489  };
3490 
3491  /* construct in array */
3492  ir_node *const in[] = {
3493  left,
3494  right,
3495  };
3496 
3497  ir_graph *const irg = get_irn_irg(block);
3498  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SubS, mode_T, 2, in);
3499 
3500  /* flags */
3501  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3502  irn_flags |= arch_irn_flag_modify_flags;
3503  irn_flags |= arch_irn_flag_rematerializable;
3504 
3505  /* init node attributes */
3506  int const n_res = 2;
3507  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3508  (void)attr; /* avoid potential warning */
3509  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3510  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3511  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3512  out_infos[0].req = &arm_class_reg_req_gp;
3513  out_infos[1].req = &arm_class_reg_req_flags;
3514 
3515  verify_new_node(res);
3516  return optimize_node(res);
3517 }
3518 
3519 ir_node *new_bd_arm_SubS_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate)
3520 {
3521  static arch_register_req_t const *in_reqs[] = {
3522  &arm_class_reg_req_gp,
3523  &arm_class_reg_req_gp,
3524  };
3525 
3526  /* construct in array */
3527  ir_node *const in[] = {
3528  left,
3529  right,
3530  };
3531 
3532  ir_graph *const irg = get_irn_irg(block);
3533  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SubS, mode_T, 2, in);
3534 
3535  /* flags */
3536  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3537  irn_flags |= arch_irn_flag_modify_flags;
3538  irn_flags |= arch_irn_flag_rematerializable;
3539 
3540  /* init node attributes */
3541  int const n_res = 2;
3542  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3543  (void)attr; /* avoid potential warning */
3544  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3545  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3546  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3547  out_infos[0].req = &arm_class_reg_req_gp;
3548  out_infos[1].req = &arm_class_reg_req_flags;
3549 
3550  verify_new_node(res);
3551  return optimize_node(res);
3552 }
3553 
3554 ir_node *new_bd_arm_SubS_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier)
3555 {
3556  static arch_register_req_t const *in_reqs[] = {
3557  &arm_class_reg_req_gp,
3558  &arm_class_reg_req_gp,
3559  &arm_class_reg_req_gp,
3560  };
3561 
3562  /* construct in array */
3563  ir_node *const in[] = {
3564  left,
3565  right,
3566  shift,
3567  };
3568 
3569  ir_graph *const irg = get_irn_irg(block);
3570  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SubS, mode_T, 3, in);
3571 
3572  /* flags */
3573  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3574  irn_flags |= arch_irn_flag_modify_flags;
3575  irn_flags |= arch_irn_flag_rematerializable;
3576 
3577  /* init node attributes */
3578  int const n_res = 2;
3579  arm_shifter_operand_t *const attr = (arm_shifter_operand_t*)get_irn_generic_attr(res);
3580  (void)attr; /* avoid potential warning */
3581  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3582  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3583  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3584  out_infos[0].req = &arm_class_reg_req_gp;
3585  out_infos[1].req = &arm_class_reg_req_flags;
3586 
3587  verify_new_node(res);
3588  return optimize_node(res);
3589 }
3590 
3591 ir_node *new_bd_arm_SubS_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
3592 {
3593 
3594  /* construct in array */
3595  ir_node *const in[] = {
3596  left,
3597  right,
3598  };
3599 
3600  ir_graph *const irg = get_irn_irg(block);
3601  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SubS_t, mode_T, 2, in);
3602 
3603  /* flags */
3604  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3605 
3606  /* init node attributes */
3607  int const n_res = 2;
3608  (void)irn_flags, (void)n_res;
3609 
3610  verify_new_node(res);
3611  return optimize_node(res);
3612 }
3613 
3614 ir_node *new_bd_arm_Suf(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1, ir_mode *op_mode)
3615 {
3616  static arch_register_req_t const *in_reqs[] = {
3617  &arm_class_reg_req_fpa,
3618  &arm_class_reg_req_fpa,
3619  };
3620 
3621  /* construct in array */
3622  ir_node *const in[] = {
3623  op0,
3624  op1,
3625  };
3626 
3627  ir_graph *const irg = get_irn_irg(block);
3628  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Suf, mode_F, 2, in);
3629 
3630  /* flags */
3631  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3632  irn_flags |= arch_irn_flag_rematerializable;
3633 
3634  /* init node attributes */
3635  int const n_res = 1;
3636  arm_farith_attr_t *const attr = (arm_farith_attr_t*)get_irn_generic_attr(res);
3637  (void)attr; /* avoid potential warning */
3638  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3639  init_arm_farith_attributes(res, op_mode);
3640  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3641  out_infos[0].req = &arm_class_reg_req_fpa;
3642 
3643  verify_new_node(res);
3644  return optimize_node(res);
3645 }
3646 
3647 ir_node *new_bd_arm_SwitchJmp(dbg_info *dbgi, ir_node *block, ir_node *op0, int n_res, const ir_switch_table *table)
3648 {
3649  static arch_register_req_t const *in_reqs[] = {
3650  &arm_class_reg_req_gp,
3651  };
3652 
3653  /* construct in array */
3654  ir_node *const in[] = {
3655  op0,
3656  };
3657 
3658  ir_graph *const irg = get_irn_irg(block);
3659  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_SwitchJmp, mode_T, 1, in);
3660 
3661  /* flags */
3662  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3663 
3664  /* init node attributes */
3665  arm_SwitchJmp_attr_t *const attr = (arm_SwitchJmp_attr_t*)get_irn_generic_attr(res);
3666  (void)attr; /* avoid potential warning */
3667  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3668  be_switch_attr_init(res, &attr->swtch, table, NULL);
3669 
3670  verify_new_node(res);
3671  return optimize_node(res);
3672 }
3673 
3674 ir_node *new_bd_arm_Tst_imm(dbg_info *dbgi, ir_node *block, ir_node *left, unsigned char immediate_value, unsigned char immediate_rot, bool ins_permuted, bool is_unsigned)
3675 {
3676  static arch_register_req_t const *in_reqs[] = {
3677  &arm_class_reg_req_gp,
3678  };
3679 
3680  /* construct in array */
3681  ir_node *const in[] = {
3682  left,
3683  };
3684 
3685  ir_graph *const irg = get_irn_irg(block);
3686  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 1, in);
3687 
3688  /* flags */
3689  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3690  irn_flags |= arch_irn_flag_rematerializable;
3691  irn_flags |= arch_irn_flag_modify_flags;
3692 
3693  /* init node attributes */
3694  int const n_res = 1;
3695  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
3696  (void)attr; /* avoid potential warning */
3697  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3698  init_arm_shifter_operand(res, 1, immediate_value, ARM_SHF_IMM, immediate_rot);
3699  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3700  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3701  out_infos[0].req = &arm_class_reg_req_flags;
3702 
3703  verify_new_node(res);
3704  return optimize_node(res);
3705 }
3706 
3707 ir_node *new_bd_arm_Tst_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, bool ins_permuted, bool is_unsigned)
3708 {
3709  static arch_register_req_t const *in_reqs[] = {
3710  &arm_class_reg_req_gp,
3711  &arm_class_reg_req_gp,
3712  };
3713 
3714  /* construct in array */
3715  ir_node *const in[] = {
3716  left,
3717  right,
3718  };
3719 
3720  ir_graph *const irg = get_irn_irg(block);
3721  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 2, in);
3722 
3723  /* flags */
3724  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3725  irn_flags |= arch_irn_flag_rematerializable;
3726  irn_flags |= arch_irn_flag_modify_flags;
3727 
3728  /* init node attributes */
3729  int const n_res = 1;
3730  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
3731  (void)attr; /* avoid potential warning */
3732  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3733  init_arm_shifter_operand(res, 1, 0, ARM_SHF_REG, 0);
3734  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3735  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3736  out_infos[0].req = &arm_class_reg_req_flags;
3737 
3738  verify_new_node(res);
3739  return optimize_node(res);
3740 }
3741 
3742 ir_node *new_bd_arm_Tst_reg_shift_imm(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, arm_shift_modifier_t shift_modifier, unsigned shift_immediate, bool ins_permuted, bool is_unsigned)
3743 {
3744  static arch_register_req_t const *in_reqs[] = {
3745  &arm_class_reg_req_gp,
3746  &arm_class_reg_req_gp,
3747  };
3748 
3749  /* construct in array */
3750  ir_node *const in[] = {
3751  left,
3752  right,
3753  };
3754 
3755  ir_graph *const irg = get_irn_irg(block);
3756  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 2, in);
3757 
3758  /* flags */
3759  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3760  irn_flags |= arch_irn_flag_rematerializable;
3761  irn_flags |= arch_irn_flag_modify_flags;
3762 
3763  /* init node attributes */
3764  int const n_res = 1;
3765  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
3766  (void)attr; /* avoid potential warning */
3767  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3768  init_arm_shifter_operand(res, 1, 0, shift_modifier, shift_immediate);
3769  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3770  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3771  out_infos[0].req = &arm_class_reg_req_flags;
3772 
3773  verify_new_node(res);
3774  return optimize_node(res);
3775 }
3776 
3777 ir_node *new_bd_arm_Tst_reg_shift_reg(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right, ir_node *shift, arm_shift_modifier_t shift_modifier, bool ins_permuted, bool is_unsigned)
3778 {
3779  static arch_register_req_t const *in_reqs[] = {
3780  &arm_class_reg_req_gp,
3781  &arm_class_reg_req_gp,
3782  &arm_class_reg_req_gp,
3783  };
3784 
3785  /* construct in array */
3786  ir_node *const in[] = {
3787  left,
3788  right,
3789  shift,
3790  };
3791 
3792  ir_graph *const irg = get_irn_irg(block);
3793  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_Tst, arm_mode_flags, 3, in);
3794 
3795  /* flags */
3796  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3797  irn_flags |= arch_irn_flag_rematerializable;
3798  irn_flags |= arch_irn_flag_modify_flags;
3799 
3800  /* init node attributes */
3801  int const n_res = 1;
3802  arm_cmp_attr_t *const attr = (arm_cmp_attr_t*)get_irn_generic_attr(res);
3803  (void)attr; /* avoid potential warning */
3804  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3805  init_arm_shifter_operand(res, 1, 0, shift_modifier, 0);
3806  init_arm_cmp_attr(res, ins_permuted, is_unsigned);
3807  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3808  out_infos[0].req = &arm_class_reg_req_flags;
3809 
3810  verify_new_node(res);
3811  return optimize_node(res);
3812 }
3813 
3814 ir_node *new_bd_arm_UMulL(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1)
3815 {
3816  static arch_register_req_t const *in_reqs[] = {
3817  &arm_class_reg_req_gp,
3818  &arm_class_reg_req_gp,
3819  };
3820 
3821  /* construct in array */
3822  ir_node *const in[] = {
3823  op0,
3824  op1,
3825  };
3826 
3827  ir_graph *const irg = get_irn_irg(block);
3828  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_UMulL, mode_T, 2, in);
3829 
3830  /* flags */
3831  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3832  irn_flags |= arch_irn_flag_rematerializable;
3833 
3834  /* init node attributes */
3835  int const n_res = 2;
3836  arm_attr_t *const attr = (arm_attr_t*)get_irn_generic_attr(res);
3837  (void)attr; /* avoid potential warning */
3838  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3839  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3840  out_infos[0].req = &arm_class_reg_req_gp;
3841  out_infos[1].req = &arm_class_reg_req_gp;
3842 
3843  verify_new_node(res);
3844  return optimize_node(res);
3845 }
3846 
3847 ir_node *new_bd_arm_UMulL_t(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
3848 {
3849 
3850  /* construct in array */
3851  ir_node *const in[] = {
3852  left,
3853  right,
3854  };
3855 
3856  ir_graph *const irg = get_irn_irg(block);
3857  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_UMulL_t, mode_T, 2, in);
3858 
3859  /* flags */
3860  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3861 
3862  /* init node attributes */
3863  int const n_res = 2;
3864  (void)irn_flags, (void)n_res;
3865 
3866  verify_new_node(res);
3867  return optimize_node(res);
3868 }
3869 
3870 ir_node *new_bd_arm_fConst(dbg_info *dbgi, ir_node *block, ir_tarval *tv)
3871 {
3872  arch_register_req_t const **const in_reqs = NULL;
3873 
3874 
3875  ir_graph *const irg = get_irn_irg(block);
3876  ir_node *const res = new_ir_node(dbgi, irg, block, op_arm_fConst, mode_F, 0, NULL);
3877 
3878  /* flags */
3879  arch_irn_flags_t irn_flags = arch_irn_flags_none;
3880  irn_flags |= arch_irn_flag_rematerializable;
3881 
3882  /* init node attributes */
3883  int const n_res = 1;
3884  arm_fConst_attr_t *const attr = (arm_fConst_attr_t*)get_irn_generic_attr(res);
3885  (void)attr; /* avoid potential warning */
3886  init_arm_attributes(res, irn_flags, in_reqs, n_res);
3887  attr->tv = tv;
3888  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
3889  out_infos[0].req = &arm_class_reg_req_fpa;
3890 
3891  verify_new_node(res);
3892  return optimize_node(res);
3893 }
3894 
3895 
3900 void arm_create_opcodes(void)
3901 {
3902  ir_op *op;
3903  int cur_opcode = get_next_ir_opcodes(iro_arm_last);
3904 
3905  arm_opcode_start = cur_opcode;
3906  op = new_ir_op(cur_opcode + iro_arm_AdC, "arm_AdC", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
3907  set_op_dump(op, arm_dump_node);
3908  set_op_attrs_equal(op, arm_shifter_operands_equal);
3909  set_op_copy_attr(op, be_copy_attr);
3910  set_op_tag(op, arm_op_tag);
3911  op_arm_AdC = op;
3912  op = new_ir_op(cur_opcode + iro_arm_AdC_t, "arm_AdC_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
3913  set_op_dump(op, NULL);
3914  set_op_tag(op, arm_op_tag);
3915  op_arm_AdC_t = op;
3916  op = new_ir_op(cur_opcode + iro_arm_Add, "arm_Add", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
3917  set_op_dump(op, arm_dump_node);
3918  set_op_attrs_equal(op, arm_shifter_operands_equal);
3919  set_op_copy_attr(op, be_copy_attr);
3920  set_op_tag(op, arm_op_tag);
3921  op_arm_Add = op;
3922  op = new_ir_op(cur_opcode + iro_arm_AddS, "arm_AddS", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
3923  set_op_dump(op, arm_dump_node);
3924  set_op_attrs_equal(op, arm_shifter_operands_equal);
3925  set_op_copy_attr(op, be_copy_attr);
3926  set_op_tag(op, arm_op_tag);
3927  op_arm_AddS = op;
3928  op = new_ir_op(cur_opcode + iro_arm_AddS_t, "arm_AddS_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
3929  set_op_dump(op, NULL);
3930  set_op_tag(op, arm_op_tag);
3931  op_arm_AddS_t = op;
3932  op = new_ir_op(cur_opcode + iro_arm_Address, "arm_Address", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(arm_Address_attr_t));
3933  set_op_dump(op, arm_dump_node);
3934  set_op_attrs_equal(op, arm_Address_attrs_equal);
3935  set_op_copy_attr(op, be_copy_attr);
3936  set_op_tag(op, arm_op_tag);
3937  op_arm_Address = op;
3938  op = new_ir_op(cur_opcode + iro_arm_Adf, "arm_Adf", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
3939  set_op_dump(op, arm_dump_node);
3940  set_op_attrs_equal(op, arm_farith_attrs_equal);
3941  set_op_copy_attr(op, be_copy_attr);
3942  set_op_tag(op, arm_op_tag);
3943  op_arm_Adf = op;
3944  op = new_ir_op(cur_opcode + iro_arm_And, "arm_And", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
3945  set_op_dump(op, arm_dump_node);
3946  set_op_attrs_equal(op, arm_shifter_operands_equal);
3947  set_op_copy_attr(op, be_copy_attr);
3948  set_op_tag(op, arm_op_tag);
3949  op_arm_And = op;
3950  op = new_ir_op(cur_opcode + iro_arm_B, "arm_B", op_pin_state_pinned, irop_flag_cfopcode, oparity_any, -1, sizeof(arm_attr_t));
3951  set_op_dump(op, arm_dump_node);
3952  set_op_attrs_equal(op, arm_attrs_equal);
3953  set_op_copy_attr(op, be_copy_attr);
3954  set_op_tag(op, arm_op_tag);
3955  op_arm_B = op;
3956  op = new_ir_op(cur_opcode + iro_arm_Bcc, "arm_Bcc", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_any, -1, sizeof(arm_CondJmp_attr_t));
3957  set_op_dump(op, arm_dump_node);
3958  set_op_attrs_equal(op, arm_CondJmp_attrs_equal);
3959  set_op_copy_attr(op, be_copy_attr);
3960  set_op_tag(op, arm_op_tag);
3961  op_arm_Bcc = op;
3962  op = new_ir_op(cur_opcode + iro_arm_Bic, "arm_Bic", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
3963  set_op_dump(op, arm_dump_node);
3964  set_op_attrs_equal(op, arm_shifter_operands_equal);
3965  set_op_copy_attr(op, be_copy_attr);
3966  set_op_tag(op, arm_op_tag);
3967  op_arm_Bic = op;
3968  op = new_ir_op(cur_opcode + iro_arm_Bl, "arm_Bl", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(arm_Address_attr_t));
3969  set_op_dump(op, arm_dump_node);
3970  set_op_attrs_equal(op, arm_Address_attrs_equal);
3971  set_op_copy_attr(op, be_copy_attr);
3972  set_op_tag(op, arm_op_tag);
3973  op_arm_Bl = op;
3974  op = new_ir_op(cur_opcode + iro_arm_Clz, "arm_Clz", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
3975  set_op_dump(op, arm_dump_node);
3976  set_op_attrs_equal(op, arm_attrs_equal);
3977  set_op_copy_attr(op, be_copy_attr);
3978  set_op_tag(op, arm_op_tag);
3979  op_arm_Clz = op;
3980  op = new_ir_op(cur_opcode + iro_arm_Cmfe, "arm_Cmfe", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_cmp_attr_t));
3981  set_op_dump(op, arm_dump_node);
3982  set_op_attrs_equal(op, arm_cmp_attrs_equal);
3983  set_op_copy_attr(op, be_copy_attr);
3984  set_op_tag(op, arm_op_tag);
3985  op_arm_Cmfe = op;
3986  op = new_ir_op(cur_opcode + iro_arm_Cmn, "arm_Cmn", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_cmp_attr_t));
3987  set_op_dump(op, arm_dump_node);
3988  set_op_attrs_equal(op, arm_cmp_attrs_equal);
3989  set_op_copy_attr(op, be_copy_attr);
3990  set_op_tag(op, arm_op_tag);
3991  op_arm_Cmn = op;
3992  op = new_ir_op(cur_opcode + iro_arm_Cmp, "arm_Cmp", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_cmp_attr_t));
3993  set_op_dump(op, arm_dump_node);
3994  set_op_attrs_equal(op, arm_cmp_attrs_equal);
3995  set_op_copy_attr(op, be_copy_attr);
3996  set_op_tag(op, arm_op_tag);
3997  op_arm_Cmp = op;
3998  op = new_ir_op(cur_opcode + iro_arm_Dvf, "arm_Dvf", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
3999  set_op_dump(op, arm_dump_node);
4000  set_op_attrs_equal(op, arm_farith_attrs_equal);
4001  set_op_copy_attr(op, be_copy_attr);
4002  set_op_tag(op, arm_op_tag);
4003  op_arm_Dvf = op;
4004  op = new_ir_op(cur_opcode + iro_arm_Eor, "arm_Eor", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4005  set_op_dump(op, arm_dump_node);
4006  set_op_attrs_equal(op, arm_shifter_operands_equal);
4007  set_op_copy_attr(op, be_copy_attr);
4008  set_op_tag(op, arm_op_tag);
4009  op_arm_Eor = op;
4010  op = new_ir_op(cur_opcode + iro_arm_Flt, "arm_Flt", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
4011  set_op_dump(op, arm_dump_node);
4012  set_op_attrs_equal(op, arm_farith_attrs_equal);
4013  set_op_copy_attr(op, be_copy_attr);
4014  set_op_tag(op, arm_op_tag);
4015  op_arm_Flt = op;
4016  op = new_ir_op(cur_opcode + iro_arm_FrameAddr, "arm_FrameAddr", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(arm_Address_attr_t));
4017  set_op_dump(op, arm_dump_node);
4018  set_op_attrs_equal(op, arm_Address_attrs_equal);
4019  set_op_copy_attr(op, be_copy_attr);
4020  set_op_tag(op, arm_op_tag);
4021  op_arm_FrameAddr = op;
4022  op = new_ir_op(cur_opcode + iro_arm_IJmp, "arm_IJmp", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_any, -1, sizeof(arm_attr_t));
4023  set_op_dump(op, arm_dump_node);
4024  set_op_attrs_equal(op, arm_attrs_equal);
4025  set_op_copy_attr(op, be_copy_attr);
4026  set_op_tag(op, arm_op_tag);
4027  op_arm_IJmp = op;
4028  op = new_ir_op(cur_opcode + iro_arm_Ldf, "arm_Ldf", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(arm_load_store_attr_t));
4029  set_op_dump(op, arm_dump_node);
4030  set_op_attrs_equal(op, arm_load_store_attrs_equal);
4031  set_op_copy_attr(op, be_copy_attr);
4032  set_op_tag(op, arm_op_tag);
4033  op_arm_Ldf = op;
4034  op = new_ir_op(cur_opcode + iro_arm_Ldr, "arm_Ldr", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(arm_load_store_attr_t));
4035  set_op_dump(op, arm_dump_node);
4036  set_op_attrs_equal(op, arm_load_store_attrs_equal);
4037  set_op_copy_attr(op, be_copy_attr);
4038  set_op_tag(op, arm_op_tag);
4039  op_arm_Ldr = op;
4040  op = new_ir_op(cur_opcode + iro_arm_LinkLdrPC, "arm_LinkLdrPC", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(arm_load_store_attr_t));
4041  set_op_dump(op, arm_dump_node);
4042  set_op_attrs_equal(op, arm_load_store_attrs_equal);
4043  set_op_copy_attr(op, be_copy_attr);
4044  set_op_tag(op, arm_op_tag);
4045  op_arm_LinkLdrPC = op;
4046  op = new_ir_op(cur_opcode + iro_arm_LinkMovPC, "arm_LinkMovPC", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(arm_shifter_operand_t));
4047  set_op_dump(op, arm_dump_node);
4048  set_op_attrs_equal(op, arm_shifter_operands_equal);
4049  set_op_copy_attr(op, be_copy_attr);
4050  set_op_tag(op, arm_op_tag);
4051  op_arm_LinkMovPC = op;
4052  op = new_ir_op(cur_opcode + iro_arm_Mla, "arm_Mla", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
4053  set_op_dump(op, arm_dump_node);
4054  set_op_attrs_equal(op, arm_attrs_equal);
4055  set_op_copy_attr(op, be_copy_attr);
4056  set_op_tag(op, arm_op_tag);
4057  op_arm_Mla = op;
4058  op = new_ir_op(cur_opcode + iro_arm_Mls, "arm_Mls", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
4059  set_op_dump(op, arm_dump_node);
4060  set_op_attrs_equal(op, arm_attrs_equal);
4061  set_op_copy_attr(op, be_copy_attr);
4062  set_op_tag(op, arm_op_tag);
4063  op_arm_Mls = op;
4064  op = new_ir_op(cur_opcode + iro_arm_Mov, "arm_Mov", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4065  set_op_dump(op, arm_dump_node);
4066  set_op_attrs_equal(op, arm_shifter_operands_equal);
4067  set_op_copy_attr(op, be_copy_attr);
4068  set_op_tag(op, arm_op_tag);
4069  op_arm_Mov = op;
4070  op = new_ir_op(cur_opcode + iro_arm_Muf, "arm_Muf", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
4071  set_op_dump(op, arm_dump_node);
4072  set_op_attrs_equal(op, arm_farith_attrs_equal);
4073  set_op_copy_attr(op, be_copy_attr);
4074  set_op_tag(op, arm_op_tag);
4075  op_arm_Muf = op;
4076  op = new_ir_op(cur_opcode + iro_arm_Mul, "arm_Mul", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
4077  set_op_dump(op, arm_dump_node);
4078  set_op_attrs_equal(op, arm_attrs_equal);
4079  set_op_copy_attr(op, be_copy_attr);
4080  set_op_tag(op, arm_op_tag);
4081  op_arm_Mul = op;
4082  op = new_ir_op(cur_opcode + iro_arm_Mvf, "arm_Mvf", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
4083  set_op_dump(op, arm_dump_node);
4084  set_op_attrs_equal(op, arm_farith_attrs_equal);
4085  set_op_copy_attr(op, be_copy_attr);
4086  set_op_tag(op, arm_op_tag);
4087  op_arm_Mvf = op;
4088  op = new_ir_op(cur_opcode + iro_arm_Mvn, "arm_Mvn", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4089  set_op_dump(op, arm_dump_node);
4090  set_op_attrs_equal(op, arm_shifter_operands_equal);
4091  set_op_copy_attr(op, be_copy_attr);
4092  set_op_tag(op, arm_op_tag);
4093  op_arm_Mvn = op;
4094  op = new_ir_op(cur_opcode + iro_arm_OrPl_t, "arm_OrPl_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4095  set_op_dump(op, NULL);
4096  set_op_tag(op, arm_op_tag);
4097  op_arm_OrPl_t = op;
4098  op = new_ir_op(cur_opcode + iro_arm_Orr, "arm_Orr", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4099  set_op_dump(op, arm_dump_node);
4100  set_op_attrs_equal(op, arm_shifter_operands_equal);
4101  set_op_copy_attr(op, be_copy_attr);
4102  set_op_tag(op, arm_op_tag);
4103  op_arm_Orr = op;
4104  op = new_ir_op(cur_opcode + iro_arm_OrrPl, "arm_OrrPl", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4105  set_op_dump(op, arm_dump_node);
4106  set_op_attrs_equal(op, arm_shifter_operands_equal);
4107  set_op_copy_attr(op, be_copy_attr);
4108  set_op_tag(op, arm_op_tag);
4109  op_arm_OrrPl = op;
4110  op = new_ir_op(cur_opcode + iro_arm_Pkhbt, "arm_Pkhbt", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4111  set_op_dump(op, arm_dump_node);
4112  set_op_attrs_equal(op, arm_shifter_operands_equal);
4113  set_op_copy_attr(op, be_copy_attr);
4114  set_op_tag(op, arm_op_tag);
4115  op_arm_Pkhbt = op;
4116  op = new_ir_op(cur_opcode + iro_arm_Pkhtb, "arm_Pkhtb", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4117  set_op_dump(op, arm_dump_node);
4118  set_op_attrs_equal(op, arm_shifter_operands_equal);
4119  set_op_copy_attr(op, be_copy_attr);
4120  set_op_tag(op, arm_op_tag);
4121  op_arm_Pkhtb = op;
4122  op = new_ir_op(cur_opcode + iro_arm_Return, "arm_Return", op_pin_state_pinned, irop_flag_cfopcode, oparity_variable, -1, sizeof(arm_attr_t));
4123  set_op_dump(op, arm_dump_node);
4124  set_op_attrs_equal(op, arm_attrs_equal);
4125  set_op_copy_attr(op, be_copy_attr);
4126  set_op_tag(op, arm_op_tag);
4127  op_arm_Return = op;
4128  op = new_ir_op(cur_opcode + iro_arm_RsC, "arm_RsC", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4129  set_op_dump(op, arm_dump_node);
4130  set_op_attrs_equal(op, arm_shifter_operands_equal);
4131  set_op_copy_attr(op, be_copy_attr);
4132  set_op_tag(op, arm_op_tag);
4133  op_arm_RsC = op;
4134  op = new_ir_op(cur_opcode + iro_arm_Rsb, "arm_Rsb", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4135  set_op_dump(op, arm_dump_node);
4136  set_op_attrs_equal(op, arm_shifter_operands_equal);
4137  set_op_copy_attr(op, be_copy_attr);
4138  set_op_tag(op, arm_op_tag);
4139  op_arm_Rsb = op;
4140  op = new_ir_op(cur_opcode + iro_arm_RsbS, "arm_RsbS", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4141  set_op_dump(op, arm_dump_node);
4142  set_op_attrs_equal(op, arm_shifter_operands_equal);
4143  set_op_copy_attr(op, be_copy_attr);
4144  set_op_tag(op, arm_op_tag);
4145  op_arm_RsbS = op;
4146  op = new_ir_op(cur_opcode + iro_arm_SMulL, "arm_SMulL", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
4147  set_op_dump(op, arm_dump_node);
4148  set_op_attrs_equal(op, arm_attrs_equal);
4149  set_op_copy_attr(op, be_copy_attr);
4150  set_op_tag(op, arm_op_tag);
4151  op_arm_SMulL = op;
4152  op = new_ir_op(cur_opcode + iro_arm_SMulL_t, "arm_SMulL_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4153  set_op_dump(op, NULL);
4154  set_op_tag(op, arm_op_tag);
4155  op_arm_SMulL_t = op;
4156  op = new_ir_op(cur_opcode + iro_arm_SbC, "arm_SbC", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4157  set_op_dump(op, arm_dump_node);
4158  set_op_attrs_equal(op, arm_shifter_operands_equal);
4159  set_op_copy_attr(op, be_copy_attr);
4160  set_op_tag(op, arm_op_tag);
4161  op_arm_SbC = op;
4162  op = new_ir_op(cur_opcode + iro_arm_SbC_t, "arm_SbC_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4163  set_op_dump(op, NULL);
4164  set_op_tag(op, arm_op_tag);
4165  op_arm_SbC_t = op;
4166  op = new_ir_op(cur_opcode + iro_arm_Stf, "arm_Stf", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(arm_load_store_attr_t));
4167  set_op_dump(op, arm_dump_node);
4168  set_op_attrs_equal(op, arm_load_store_attrs_equal);
4169  set_op_copy_attr(op, be_copy_attr);
4170  set_op_tag(op, arm_op_tag);
4171  op_arm_Stf = op;
4172  op = new_ir_op(cur_opcode + iro_arm_Str, "arm_Str", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(arm_load_store_attr_t));
4173  set_op_dump(op, arm_dump_node);
4174  set_op_attrs_equal(op, arm_load_store_attrs_equal);
4175  set_op_copy_attr(op, be_copy_attr);
4176  set_op_tag(op, arm_op_tag);
4177  op_arm_Str = op;
4178  op = new_ir_op(cur_opcode + iro_arm_Sub, "arm_Sub", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4179  set_op_dump(op, arm_dump_node);
4180  set_op_attrs_equal(op, arm_shifter_operands_equal);
4181  set_op_copy_attr(op, be_copy_attr);
4182  set_op_tag(op, arm_op_tag);
4183  op_arm_Sub = op;
4184  op = new_ir_op(cur_opcode + iro_arm_SubS, "arm_SubS", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_shifter_operand_t));
4185  set_op_dump(op, arm_dump_node);
4186  set_op_attrs_equal(op, arm_shifter_operands_equal);
4187  set_op_copy_attr(op, be_copy_attr);
4188  set_op_tag(op, arm_op_tag);
4189  op_arm_SubS = op;
4190  op = new_ir_op(cur_opcode + iro_arm_SubS_t, "arm_SubS_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4191  set_op_dump(op, NULL);
4192  set_op_tag(op, arm_op_tag);
4193  op_arm_SubS_t = op;
4194  op = new_ir_op(cur_opcode + iro_arm_Suf, "arm_Suf", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_farith_attr_t));
4195  set_op_dump(op, arm_dump_node);
4196  set_op_attrs_equal(op, arm_farith_attrs_equal);
4197  set_op_copy_attr(op, be_copy_attr);
4198  set_op_tag(op, arm_op_tag);
4199  op_arm_Suf = op;
4200  op = new_ir_op(cur_opcode + iro_arm_SwitchJmp, "arm_SwitchJmp", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_any, -1, sizeof(arm_SwitchJmp_attr_t));
4201  set_op_dump(op, arm_dump_node);
4202  set_op_attrs_equal(op, arm_SwitchJmp_attrs_equal);
4203  set_op_copy_attr(op, be_copy_attr);
4204  set_op_tag(op, arm_op_tag);
4205  op_arm_SwitchJmp = op;
4206  op = new_ir_op(cur_opcode + iro_arm_Tst, "arm_Tst", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_cmp_attr_t));
4207  set_op_dump(op, arm_dump_node);
4208  set_op_attrs_equal(op, arm_cmp_attrs_equal);
4209  set_op_copy_attr(op, be_copy_attr);
4210  set_op_tag(op, arm_op_tag);
4211  op_arm_Tst = op;
4212  op = new_ir_op(cur_opcode + iro_arm_UMulL, "arm_UMulL", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(arm_attr_t));
4213  set_op_dump(op, arm_dump_node);
4214  set_op_attrs_equal(op, arm_attrs_equal);
4215  set_op_copy_attr(op, be_copy_attr);
4216  set_op_tag(op, arm_op_tag);
4217  op_arm_UMulL = op;
4218  op = new_ir_op(cur_opcode + iro_arm_UMulL_t, "arm_UMulL_t", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
4219  set_op_dump(op, NULL);
4220  set_op_tag(op, arm_op_tag);
4221  op_arm_UMulL_t = op;
4222  op = new_ir_op(cur_opcode + iro_arm_fConst, "arm_fConst", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(arm_fConst_attr_t));
4223  set_op_dump(op, arm_dump_node);
4224  set_op_attrs_equal(op, arm_fConst_attrs_equal);
4225  set_op_copy_attr(op, be_copy_attr);
4226  set_op_tag(op, arm_op_tag);
4227  op_arm_fConst = op;
4228 
4229 }
4230 
4231 void arm_free_opcodes(void)
4232 {
4233  free_ir_op(op_arm_AdC); op_arm_AdC = NULL;
4234  free_ir_op(op_arm_AdC_t); op_arm_AdC_t = NULL;
4235  free_ir_op(op_arm_Add); op_arm_Add = NULL;
4236  free_ir_op(op_arm_AddS); op_arm_AddS = NULL;
4237  free_ir_op(op_arm_AddS_t); op_arm_AddS_t = NULL;
4238  free_ir_op(op_arm_Address); op_arm_Address = NULL;
4239  free_ir_op(op_arm_Adf); op_arm_Adf = NULL;
4240  free_ir_op(op_arm_And); op_arm_And = NULL;
4241  free_ir_op(op_arm_B); op_arm_B = NULL;
4242  free_ir_op(op_arm_Bcc); op_arm_Bcc = NULL;
4243  free_ir_op(op_arm_Bic); op_arm_Bic = NULL;
4244  free_ir_op(op_arm_Bl); op_arm_Bl = NULL;
4245  free_ir_op(op_arm_Clz); op_arm_Clz = NULL;
4246  free_ir_op(op_arm_Cmfe); op_arm_Cmfe = NULL;
4247  free_ir_op(op_arm_Cmn); op_arm_Cmn = NULL;
4248  free_ir_op(op_arm_Cmp); op_arm_Cmp = NULL;
4249  free_ir_op(op_arm_Dvf); op_arm_Dvf = NULL;
4250  free_ir_op(op_arm_Eor); op_arm_Eor = NULL;
4251  free_ir_op(op_arm_Flt); op_arm_Flt = NULL;
4252  free_ir_op(op_arm_FrameAddr); op_arm_FrameAddr = NULL;
4253  free_ir_op(op_arm_IJmp); op_arm_IJmp = NULL;
4254  free_ir_op(op_arm_Ldf); op_arm_Ldf = NULL;
4255  free_ir_op(op_arm_Ldr); op_arm_Ldr = NULL;
4256  free_ir_op(op_arm_LinkLdrPC); op_arm_LinkLdrPC = NULL;
4257  free_ir_op(op_arm_LinkMovPC); op_arm_LinkMovPC = NULL;
4258  free_ir_op(op_arm_Mla); op_arm_Mla = NULL;
4259  free_ir_op(op_arm_Mls); op_arm_Mls = NULL;
4260  free_ir_op(op_arm_Mov); op_arm_Mov = NULL;
4261  free_ir_op(op_arm_Muf); op_arm_Muf = NULL;
4262  free_ir_op(op_arm_Mul); op_arm_Mul = NULL;
4263  free_ir_op(op_arm_Mvf); op_arm_Mvf = NULL;
4264  free_ir_op(op_arm_Mvn); op_arm_Mvn = NULL;
4265  free_ir_op(op_arm_OrPl_t); op_arm_OrPl_t = NULL;
4266  free_ir_op(op_arm_Orr); op_arm_Orr = NULL;
4267  free_ir_op(op_arm_OrrPl); op_arm_OrrPl = NULL;
4268  free_ir_op(op_arm_Pkhbt); op_arm_Pkhbt = NULL;
4269  free_ir_op(op_arm_Pkhtb); op_arm_Pkhtb = NULL;
4270  free_ir_op(op_arm_Return); op_arm_Return = NULL;
4271  free_ir_op(op_arm_RsC); op_arm_RsC = NULL;
4272  free_ir_op(op_arm_Rsb); op_arm_Rsb = NULL;
4273  free_ir_op(op_arm_RsbS); op_arm_RsbS = NULL;
4274  free_ir_op(op_arm_SMulL); op_arm_SMulL = NULL;
4275  free_ir_op(op_arm_SMulL_t); op_arm_SMulL_t = NULL;
4276  free_ir_op(op_arm_SbC); op_arm_SbC = NULL;
4277  free_ir_op(op_arm_SbC_t); op_arm_SbC_t = NULL;
4278  free_ir_op(op_arm_Stf); op_arm_Stf = NULL;
4279  free_ir_op(op_arm_Str); op_arm_Str = NULL;
4280  free_ir_op(op_arm_Sub); op_arm_Sub = NULL;
4281  free_ir_op(op_arm_SubS); op_arm_SubS = NULL;
4282  free_ir_op(op_arm_SubS_t); op_arm_SubS_t = NULL;
4283  free_ir_op(op_arm_Suf); op_arm_Suf = NULL;
4284  free_ir_op(op_arm_SwitchJmp); op_arm_SwitchJmp = NULL;
4285  free_ir_op(op_arm_Tst); op_arm_Tst = NULL;
4286  free_ir_op(op_arm_UMulL); op_arm_UMulL = NULL;
4287  free_ir_op(op_arm_UMulL_t); op_arm_UMulL_t = NULL;
4288  free_ir_op(op_arm_fConst); op_arm_fConst = NULL;
4289 
4290 }
Nothing.
Definition: irop.h:43
unsigned get_irn_opcode(const ir_node *node)
Returns the opcode-enum of the node.
Forking control flow at this operation.
Definition: irop.h:49
ir_graph * get_irn_irg(const ir_node *node)
Returns the ir_graph this node belongs to.
struct ir_op ir_op
Node Opcode.
Definition: firm_types.h:56
void set_op_attrs_equal(ir_op *op, node_attrs_equal_func func)
Sets attrs_equal callback func for operation op.
void verify_new_node(ir_node *node)
If firm is built in debug mode, verify that a newly created node is fine.
struct dbg_info dbg_info
Source Reference.
Definition: firm_types.h:40
void * get_irn_generic_attr(ir_node *node)
Returns a pointer to the node attributes.
ir_mode * mode_M
memory
Definition: irmode.h:190
struct ir_tarval ir_tarval
Target Machine Value.
Definition: firm_types.h:68
ir_op * get_irn_op(const ir_node *node)
Returns the opcode struct of the node.
ir_node * optimize_node(ir_node *n)
Applies local optimizations to a single node.
ir_node * new_ir_node(dbg_info *db, ir_graph *irg, ir_node *block, ir_op *op, ir_mode *mode, int arity, ir_node *const *in)
IR node constructor.
This operation is a control flow operation.
Definition: irop.h:45
struct ir_switch_table ir_switch_table
A switch table mapping integer numbers to proj-numbers of a Switch-node.
Definition: firm_types.h:102
ir_mode * mode_T
tuple (none)
Definition: irmode.h:220
Nodes must remain in this basic block.
Definition: firm_types.h:200
This operation has a memory input and may change the memory state.
Definition: irop.h:54
Node must remain in this basic block if it can throw an exception, else can float.
Definition: firm_types.h:201
void set_op_copy_attr(ir_op *op, copy_attr_func func)
Sets attribute copy callback func for operation op.
The arity is not fixed by opcode, but statically known.
Definition: irop.h:32
ir_op * new_ir_op(unsigned code, const char *name, op_pin_state p, irop_flags flags, op_arity opar, int op_index, size_t attr_size)
Creates a new IR operation.
ir_relation
Relations for comparing numbers.
Definition: firm_types.h:159
This operation has no arguments and is some kind of a constant.
Definition: irop.h:50
struct ir_mode ir_mode
SSA Value mode.
Definition: firm_types.h:59
unsigned get_next_ir_opcodes(unsigned num)
Returns the next free n IR opcode number, allows to register a bunch of user ops. ...
void set_op_dump(ir_op *op, dump_node_func func)
Sets dump callback func for operation op.
struct ir_entity ir_entity
Entity.
Definition: firm_types.h:83
struct ir_node ir_node
Procedure Graph Node.
Definition: firm_types.h:53
ir_mode * mode_F
ieee754 binary32 float (single precision)
Definition: irmode.h:192
void free_ir_op(ir_op *code)
Frees an ir operation.
struct ir_graph ir_graph
Procedure Graph.
Definition: firm_types.h:74
ir_mode * mode_X
execution
Definition: irmode.h:217
Nodes of this opcode can be placed in any basic block.
Definition: firm_types.h:199
Any other arity.
Definition: irop.h:37