libFirm
gen_amd64_new_nodes.c
1 #include "gen_amd64_new_nodes.h"
2 
3 #include "benode.h"
4 #include "amd64_bearch_t.h"
5 #include "gen_amd64_regalloc_if.h"
6 #include "amd64_new_nodes_t.h"
7 #include "fourcc.h"
8 #include "irgopt.h"
9 #include "ircons_t.h"
10 
11 ir_op *op_amd64_add = NULL;
12 ir_op *op_amd64_adds = NULL;
13 ir_op *op_amd64_and = NULL;
14 ir_op *op_amd64_bsf = NULL;
15 ir_op *op_amd64_bsr = NULL;
16 ir_op *op_amd64_call = NULL;
17 ir_op *op_amd64_cltd = NULL;
18 ir_op *op_amd64_cmp = NULL;
19 ir_op *op_amd64_cmpxchg = NULL;
20 ir_op *op_amd64_cqto = NULL;
21 ir_op *op_amd64_cvtsd2ss = NULL;
22 ir_op *op_amd64_cvtsi2sd = NULL;
23 ir_op *op_amd64_cvtsi2ss = NULL;
24 ir_op *op_amd64_cvtss2sd = NULL;
25 ir_op *op_amd64_cvttsd2si = NULL;
26 ir_op *op_amd64_cvttss2si = NULL;
27 ir_op *op_amd64_div = NULL;
28 ir_op *op_amd64_divs = NULL;
29 ir_op *op_amd64_fadd = NULL;
30 ir_op *op_amd64_fchs = NULL;
31 ir_op *op_amd64_fdiv = NULL;
32 ir_op *op_amd64_fdup = NULL;
33 ir_op *op_amd64_fild = NULL;
34 ir_op *op_amd64_fisttp = NULL;
35 ir_op *op_amd64_fld = NULL;
36 ir_op *op_amd64_fld1 = NULL;
37 ir_op *op_amd64_fldz = NULL;
38 ir_op *op_amd64_fmul = NULL;
39 ir_op *op_amd64_fpop = NULL;
40 ir_op *op_amd64_fst = NULL;
41 ir_op *op_amd64_fstp = NULL;
42 ir_op *op_amd64_fsub = NULL;
43 ir_op *op_amd64_fucomi = NULL;
44 ir_op *op_amd64_fxch = NULL;
45 ir_op *op_amd64_haddpd = NULL;
46 ir_op *op_amd64_idiv = NULL;
47 ir_op *op_amd64_ijmp = NULL;
48 ir_op *op_amd64_imul = NULL;
49 ir_op *op_amd64_imul_1op = NULL;
50 ir_op *op_amd64_jcc = NULL;
51 ir_op *op_amd64_jmp = NULL;
52 ir_op *op_amd64_jmp_switch = NULL;
53 ir_op *op_amd64_l_haddpd = NULL;
54 ir_op *op_amd64_l_punpckldq = NULL;
55 ir_op *op_amd64_l_subpd = NULL;
56 ir_op *op_amd64_lea = NULL;
57 ir_op *op_amd64_leave = NULL;
58 ir_op *op_amd64_mov_gp = NULL;
59 ir_op *op_amd64_mov_imm = NULL;
60 ir_op *op_amd64_mov_store = NULL;
61 ir_op *op_amd64_movd = NULL;
62 ir_op *op_amd64_movd_gp_xmm = NULL;
63 ir_op *op_amd64_movd_xmm_gp = NULL;
64 ir_op *op_amd64_movdqa = NULL;
65 ir_op *op_amd64_movdqu = NULL;
66 ir_op *op_amd64_movdqu_store = NULL;
67 ir_op *op_amd64_movs = NULL;
68 ir_op *op_amd64_movs_store_xmm = NULL;
69 ir_op *op_amd64_movs_xmm = NULL;
70 ir_op *op_amd64_mul = NULL;
71 ir_op *op_amd64_muls = NULL;
72 ir_op *op_amd64_neg = NULL;
73 ir_op *op_amd64_not = NULL;
74 ir_op *op_amd64_or = NULL;
75 ir_op *op_amd64_pop_am = NULL;
76 ir_op *op_amd64_punpckldq = NULL;
77 ir_op *op_amd64_push_am = NULL;
78 ir_op *op_amd64_push_reg = NULL;
79 ir_op *op_amd64_ret = NULL;
80 ir_op *op_amd64_sar = NULL;
81 ir_op *op_amd64_sbb = NULL;
82 ir_op *op_amd64_setcc = NULL;
83 ir_op *op_amd64_shl = NULL;
84 ir_op *op_amd64_shr = NULL;
85 ir_op *op_amd64_sub = NULL;
86 ir_op *op_amd64_sub_sp = NULL;
87 ir_op *op_amd64_subpd = NULL;
88 ir_op *op_amd64_subs = NULL;
89 ir_op *op_amd64_ucomis = NULL;
90 ir_op *op_amd64_xor = NULL;
91 ir_op *op_amd64_xor_0 = NULL;
92 ir_op *op_amd64_xorp = NULL;
93 ir_op *op_amd64_xorp_0 = NULL;
94 
95 
96 static int amd64_opcode_start = -1;
97 
99 #define amd64_op_tag FOURCC('a', 'm', 'd', '6')
100 
102 int is_amd64_op(const ir_op *op)
103 {
104  return get_op_tag(op) == amd64_op_tag;
105 }
106 
108 int is_amd64_irn(const ir_node *node)
109 {
110  return is_amd64_op(get_irn_op(node));
111 }
112 
113 int get_amd64_irn_opcode(const ir_node *node)
114 {
115  assert(is_amd64_irn(node));
116  return get_irn_opcode(node) - amd64_opcode_start;
117 }
118 
119 #undef BIT
120 #define BIT(x) (1 << (x))
121 
122 static const unsigned amd64_limit_gp_rbp[] = { BIT(REG_GP_RBP), 0 };
123 static const unsigned amd64_limit_gp_rsp[] = { BIT(REG_GP_RSP), 0 };
124 
125 static const arch_register_req_t amd64_requirements_gp_rbp_I = {
126  .cls = &amd64_reg_classes[CLASS_amd64_gp],
127  .limited = amd64_limit_gp_rbp,
128  .should_be_same = 0,
129  .must_be_different = 0,
130  .width = 1,
131  .ignore = true,
132 };
133 
134 static const arch_register_req_t amd64_requirements_gp_rsp_I = {
135  .cls = &amd64_reg_classes[CLASS_amd64_gp],
136  .limited = amd64_limit_gp_rsp,
137  .should_be_same = 0,
138  .must_be_different = 0,
139  .width = 1,
140  .ignore = true,
141 };
142 
143 static const arch_register_req_t amd64_requirements_gp_in_r0 = {
144  .cls = &amd64_reg_classes[CLASS_amd64_gp],
145  .limited = NULL,
146  .should_be_same = 1,
147  .must_be_different = 0,
148  .width = 1,
149 };
150 
151 
152 
153 ir_node *new_bd_amd64_add(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
154 {
155 
156 
157  ir_graph *const irg = get_irn_irg(block);
158  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_add, mode_T, arity, in);
159 
160  /* flags */
161  arch_irn_flags_t irn_flags = arch_irn_flags_none;
162  irn_flags |= arch_irn_flag_modify_flags;
163  irn_flags |= arch_irn_flag_rematerializable;
164  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
165 
166  /* init node attributes */
167  int const n_res = 3;
168  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
169  (void)attr; /* avoid potential warning */
170  be_info_init_irn(res, irn_flags, in_reqs, n_res);
171  *attr = *attr_init;
172  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
173  out_infos[0].req = &amd64_class_reg_req_gp;
174  out_infos[1].req = &amd64_class_reg_req_flags;
175  out_infos[2].req = &arch_memory_requirement;
176 
177  verify_new_node(res);
178  return optimize_node(res);
179 }
180 
181 ir_node *new_bd_amd64_adds(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
182 {
183 
184 
185  ir_graph *const irg = get_irn_irg(block);
186  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_adds, mode_T, arity, in);
187 
188  /* flags */
189  arch_irn_flags_t irn_flags = arch_irn_flags_none;
190  irn_flags |= arch_irn_flag_rematerializable;
191  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
192 
193  /* init node attributes */
194  int const n_res = 3;
195  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
196  (void)attr; /* avoid potential warning */
197  be_info_init_irn(res, irn_flags, in_reqs, n_res);
198  *attr = *attr_init;
199  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
200  out_infos[0].req = &amd64_class_reg_req_xmm;
201  out_infos[1].req = &arch_no_requirement;
202  out_infos[2].req = &arch_memory_requirement;
203 
204  verify_new_node(res);
205  return optimize_node(res);
206 }
207 
208 ir_node *new_bd_amd64_and(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
209 {
210 
211 
212  ir_graph *const irg = get_irn_irg(block);
213  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_and, mode_T, arity, in);
214 
215  /* flags */
216  arch_irn_flags_t irn_flags = arch_irn_flags_none;
217  irn_flags |= arch_irn_flag_modify_flags;
218  irn_flags |= arch_irn_flag_rematerializable;
219  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
220 
221  /* init node attributes */
222  int const n_res = 3;
223  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
224  (void)attr; /* avoid potential warning */
225  be_info_init_irn(res, irn_flags, in_reqs, n_res);
226  *attr = *attr_init;
227  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
228  out_infos[0].req = &amd64_class_reg_req_gp;
229  out_infos[1].req = &amd64_class_reg_req_flags;
230  out_infos[2].req = &arch_memory_requirement;
231 
232  verify_new_node(res);
233  return optimize_node(res);
234 }
235 
236 ir_node *new_bd_amd64_bsf(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
237 {
238 
239 
240  ir_graph *const irg = get_irn_irg(block);
241  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_bsf, mode_T, arity, in);
242 
243  /* flags */
244  arch_irn_flags_t irn_flags = arch_irn_flags_none;
245  irn_flags |= arch_irn_flag_modify_flags;
246  irn_flags |= arch_irn_flag_rematerializable;
247 
248  /* init node attributes */
249  int const n_res = 3;
250  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
251  (void)attr; /* avoid potential warning */
252  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
253  attr->addr = addr;
254  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
255  out_infos[0].req = &amd64_class_reg_req_gp;
256  out_infos[1].req = &amd64_class_reg_req_flags;
257  out_infos[2].req = &arch_memory_requirement;
258 
259  verify_new_node(res);
260  return optimize_node(res);
261 }
262 
263 ir_node *new_bd_amd64_bsr(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
264 {
265 
266 
267  ir_graph *const irg = get_irn_irg(block);
268  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_bsr, mode_T, arity, in);
269 
270  /* flags */
271  arch_irn_flags_t irn_flags = arch_irn_flags_none;
272  irn_flags |= arch_irn_flag_modify_flags;
273  irn_flags |= arch_irn_flag_rematerializable;
274 
275  /* init node attributes */
276  int const n_res = 3;
277  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
278  (void)attr; /* avoid potential warning */
279  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
280  attr->addr = addr;
281  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
282  out_infos[0].req = &amd64_class_reg_req_gp;
283  out_infos[1].req = &amd64_class_reg_req_flags;
284  out_infos[2].req = &arch_memory_requirement;
285 
286  verify_new_node(res);
287  return optimize_node(res);
288 }
289 
290 ir_node *new_bd_amd64_call(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, int n_res, const amd64_call_addr_attr_t *attr_init)
291 {
292 
293 
294  ir_graph *const irg = get_irn_irg(block);
295  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_call, mode_T, arity, in);
296 
297  /* flags */
298  arch_irn_flags_t irn_flags = arch_irn_flags_none;
299  irn_flags |= arch_irn_flag_modify_flags;
300 
301  /* init node attributes */
302  amd64_call_addr_attr_t *const attr = (amd64_call_addr_attr_t*)get_irn_generic_attr(res);
303  (void)attr; /* avoid potential warning */
304  be_info_init_irn(res, irn_flags, in_reqs, n_res);
305  *attr = *attr_init;
306 
307  verify_new_node(res);
308  return optimize_node(res);
309 }
310 
311 ir_node *new_bd_amd64_cltd(dbg_info *dbgi, ir_node *block, ir_node *val)
312 {
313  static arch_register_req_t const *in_reqs[] = {
314  &amd64_single_reg_req_gp_rax,
315  };
316 
317  /* construct in array */
318  ir_node *const in[] = {
319  val,
320  };
321 
322  ir_graph *const irg = get_irn_irg(block);
323  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cltd, mode_Lu, 1, in);
324 
325  /* flags */
326  arch_irn_flags_t irn_flags = arch_irn_flags_none;
327 
328  /* init node attributes */
329  int const n_res = 1;
330  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
331  (void)attr; /* avoid potential warning */
332  amd64_op_mode_t op_mode = AMD64_OP_NONE;
333 x86_insn_size_t size = X86_SIZE_32;
334 
335  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
336  arch_set_additional_pressure(res, &amd64_reg_classes[CLASS_amd64_gp], 1);
337  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
338  out_infos[0].req = &amd64_single_reg_req_gp_rdx;
339 
340  verify_new_node(res);
341  return optimize_node(res);
342 }
343 
344 ir_node *new_bd_amd64_cmp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
345 {
346 
347 
348  ir_graph *const irg = get_irn_irg(block);
349  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cmp, mode_T, arity, in);
350 
351  /* flags */
352  arch_irn_flags_t irn_flags = arch_irn_flags_none;
353  irn_flags |= arch_irn_flag_modify_flags;
354  irn_flags |= arch_irn_flag_rematerializable;
355 
356  /* init node attributes */
357  int const n_res = 3;
358  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
359  (void)attr; /* avoid potential warning */
360  be_info_init_irn(res, irn_flags, in_reqs, n_res);
361  *attr = *attr_init;
362  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
363  out_infos[0].req = &arch_no_requirement;
364  out_infos[1].req = &amd64_class_reg_req_flags;
365  out_infos[2].req = &arch_memory_requirement;
366 
367  verify_new_node(res);
368  return optimize_node(res);
369 }
370 
371 ir_node *new_bd_amd64_cmpxchg(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
372 {
373 
374 
375  ir_graph *const irg = get_irn_irg(block);
376  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cmpxchg, mode_T, arity, in);
377 
378  /* flags */
379  arch_irn_flags_t irn_flags = arch_irn_flags_none;
380  irn_flags |= arch_irn_flag_modify_flags;
381 
382  /* init node attributes */
383  int const n_res = 3;
384  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
385  (void)attr; /* avoid potential warning */
386  be_info_init_irn(res, irn_flags, in_reqs, n_res);
387  *attr = *attr_init;
388  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
389  out_infos[0].req = &amd64_single_reg_req_gp_rax;
390  out_infos[1].req = &amd64_class_reg_req_flags;
391  out_infos[2].req = &arch_memory_requirement;
392 
393  verify_new_node(res);
394  return optimize_node(res);
395 }
396 
397 ir_node *new_bd_amd64_cqto(dbg_info *dbgi, ir_node *block, ir_node *val)
398 {
399  static arch_register_req_t const *in_reqs[] = {
400  &amd64_single_reg_req_gp_rax,
401  };
402 
403  /* construct in array */
404  ir_node *const in[] = {
405  val,
406  };
407 
408  ir_graph *const irg = get_irn_irg(block);
409  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cqto, mode_Lu, 1, in);
410 
411  /* flags */
412  arch_irn_flags_t irn_flags = arch_irn_flags_none;
413 
414  /* init node attributes */
415  int const n_res = 1;
416  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
417  (void)attr; /* avoid potential warning */
418  amd64_op_mode_t op_mode = AMD64_OP_NONE;
419 x86_insn_size_t size = X86_SIZE_64;
420 
421  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
422  arch_set_additional_pressure(res, &amd64_reg_classes[CLASS_amd64_gp], 1);
423  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
424  out_infos[0].req = &amd64_single_reg_req_gp_rdx;
425 
426  verify_new_node(res);
427  return optimize_node(res);
428 }
429 
430 ir_node *new_bd_amd64_cvtsd2ss(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, amd64_op_mode_t op_mode, x86_addr_t addr)
431 {
432 
433 
434  ir_graph *const irg = get_irn_irg(block);
435  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvtsd2ss, mode_T, arity, in);
436 
437  /* flags */
438  arch_irn_flags_t irn_flags = arch_irn_flags_none;
439 
440  /* init node attributes */
441  int const n_res = 3;
442  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
443  (void)attr; /* avoid potential warning */
444  x86_insn_size_t size = X86_SIZE_64;
445 
446  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
447  attr->addr = addr;
448  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
449  out_infos[0].req = &amd64_class_reg_req_xmm;
450  out_infos[1].req = &arch_no_requirement;
451  out_infos[2].req = &arch_memory_requirement;
452 
453  verify_new_node(res);
454  return optimize_node(res);
455 }
456 
457 ir_node *new_bd_amd64_cvtsi2sd(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
458 {
459 
460 
461  ir_graph *const irg = get_irn_irg(block);
462  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvtsi2sd, mode_T, arity, in);
463 
464  /* flags */
465  arch_irn_flags_t irn_flags = arch_irn_flags_none;
466 
467  /* init node attributes */
468  int const n_res = 3;
469  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
470  (void)attr; /* avoid potential warning */
471  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
472  attr->addr = addr;
473  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
474  out_infos[0].req = &amd64_class_reg_req_xmm;
475  out_infos[1].req = &arch_no_requirement;
476  out_infos[2].req = &arch_memory_requirement;
477 
478  verify_new_node(res);
479  return optimize_node(res);
480 }
481 
482 ir_node *new_bd_amd64_cvtsi2ss(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
483 {
484 
485 
486  ir_graph *const irg = get_irn_irg(block);
487  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvtsi2ss, mode_T, arity, in);
488 
489  /* flags */
490  arch_irn_flags_t irn_flags = arch_irn_flags_none;
491 
492  /* init node attributes */
493  int const n_res = 3;
494  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
495  (void)attr; /* avoid potential warning */
496  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
497  attr->addr = addr;
498  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
499  out_infos[0].req = &amd64_class_reg_req_xmm;
500  out_infos[1].req = &arch_no_requirement;
501  out_infos[2].req = &arch_memory_requirement;
502 
503  verify_new_node(res);
504  return optimize_node(res);
505 }
506 
507 ir_node *new_bd_amd64_cvtss2sd(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
508 {
509 
510 
511  ir_graph *const irg = get_irn_irg(block);
512  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvtss2sd, mode_T, arity, in);
513 
514  /* flags */
515  arch_irn_flags_t irn_flags = arch_irn_flags_none;
516 
517  /* init node attributes */
518  int const n_res = 3;
519  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
520  (void)attr; /* avoid potential warning */
521  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
522  attr->addr = addr;
523  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
524  out_infos[0].req = &amd64_class_reg_req_xmm;
525  out_infos[1].req = &arch_no_requirement;
526  out_infos[2].req = &arch_memory_requirement;
527 
528  verify_new_node(res);
529  return optimize_node(res);
530 }
531 
532 ir_node *new_bd_amd64_cvttsd2si(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
533 {
534 
535 
536  ir_graph *const irg = get_irn_irg(block);
537  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvttsd2si, mode_T, arity, in);
538 
539  /* flags */
540  arch_irn_flags_t irn_flags = arch_irn_flags_none;
541 
542  /* init node attributes */
543  int const n_res = 3;
544  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
545  (void)attr; /* avoid potential warning */
546  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
547  attr->addr = addr;
548  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
549  out_infos[0].req = &amd64_class_reg_req_gp;
550  out_infos[1].req = &arch_no_requirement;
551  out_infos[2].req = &arch_memory_requirement;
552 
553  verify_new_node(res);
554  return optimize_node(res);
555 }
556 
557 ir_node *new_bd_amd64_cvttss2si(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
558 {
559 
560 
561  ir_graph *const irg = get_irn_irg(block);
562  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_cvttss2si, mode_T, arity, in);
563 
564  /* flags */
565  arch_irn_flags_t irn_flags = arch_irn_flags_none;
566 
567  /* init node attributes */
568  int const n_res = 3;
569  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
570  (void)attr; /* avoid potential warning */
571  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
572  attr->addr = addr;
573  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
574  out_infos[0].req = &amd64_class_reg_req_gp;
575  out_infos[1].req = &arch_no_requirement;
576  out_infos[2].req = &arch_memory_requirement;
577 
578  verify_new_node(res);
579  return optimize_node(res);
580 }
581 
582 ir_node *new_bd_amd64_div(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size)
583 {
584 
585 
586  ir_graph *const irg = get_irn_irg(block);
587  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_div, mode_T, arity, in);
588 
589  /* flags */
590  arch_irn_flags_t irn_flags = arch_irn_flags_none;
591  irn_flags |= arch_irn_flag_modify_flags;
592 
593  /* init node attributes */
594  int const n_res = 4;
595  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
596  (void)attr; /* avoid potential warning */
597  x86_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };
598 amd64_op_mode_t op_mode = AMD64_OP_REG;
599 
600  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
601  attr->addr = addr;
602  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
603  out_infos[0].req = &amd64_single_reg_req_gp_rax;
604  out_infos[1].req = &amd64_class_reg_req_flags;
605  out_infos[2].req = &arch_memory_requirement;
606  out_infos[3].req = &amd64_single_reg_req_gp_rdx;
607 
608  verify_new_node(res);
609  return optimize_node(res);
610 }
611 
612 ir_node *new_bd_amd64_divs(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
613 {
614 
615 
616  ir_graph *const irg = get_irn_irg(block);
617  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_divs, mode_T, arity, in);
618 
619  /* flags */
620  arch_irn_flags_t irn_flags = arch_irn_flags_none;
621  irn_flags |= arch_irn_flag_rematerializable;
622 
623  /* init node attributes */
624  int const n_res = 3;
625  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
626  (void)attr; /* avoid potential warning */
627  be_info_init_irn(res, irn_flags, in_reqs, n_res);
628  *attr = *attr_init;
629  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
630  out_infos[0].req = &amd64_class_reg_req_xmm;
631  out_infos[1].req = &arch_no_requirement;
632  out_infos[2].req = &arch_memory_requirement;
633 
634  verify_new_node(res);
635  return optimize_node(res);
636 }
637 
638 ir_node *new_bd_amd64_fadd(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
639 {
640  static arch_register_req_t const *in_reqs[] = {
641  &amd64_class_reg_req_x87,
642  &amd64_class_reg_req_x87,
643  };
644 
645  /* construct in array */
646  ir_node *const in[] = {
647  left,
648  right,
649  };
650 
651  ir_graph *const irg = get_irn_irg(block);
652  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fadd, x86_mode_E, 2, in);
653 
654  /* flags */
655  arch_irn_flags_t irn_flags = arch_irn_flags_none;
656  irn_flags |= arch_irn_flag_rematerializable;
657 
658  /* init node attributes */
659  int const n_res = 1;
660  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
661  (void)attr; /* avoid potential warning */
662  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_X87, X86_SIZE_80);
663 
664  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
665  out_infos[0].req = &amd64_class_reg_req_x87;
666 
667  verify_new_node(res);
668  return optimize_node(res);
669 }
670 
671 ir_node *new_bd_amd64_fchs(dbg_info *dbgi, ir_node *block, ir_node *value)
672 {
673  static arch_register_req_t const *in_reqs[] = {
674  &amd64_class_reg_req_x87,
675  };
676 
677  /* construct in array */
678  ir_node *const in[] = {
679  value,
680  };
681 
682  ir_graph *const irg = get_irn_irg(block);
683  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fchs, x86_mode_E, 1, in);
684 
685  /* flags */
686  arch_irn_flags_t irn_flags = arch_irn_flags_none;
687  irn_flags |= arch_irn_flag_rematerializable;
688 
689  /* init node attributes */
690  int const n_res = 1;
691  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
692  (void)attr; /* avoid potential warning */
693  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_X87, X86_SIZE_80);
694 
695  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
696  out_infos[0].req = &amd64_class_reg_req_x87;
697 
698  verify_new_node(res);
699  return optimize_node(res);
700 }
701 
702 ir_node *new_bd_amd64_fdiv(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
703 {
704  static arch_register_req_t const *in_reqs[] = {
705  &amd64_class_reg_req_x87,
706  &amd64_class_reg_req_x87,
707  };
708 
709  /* construct in array */
710  ir_node *const in[] = {
711  left,
712  right,
713  };
714 
715  ir_graph *const irg = get_irn_irg(block);
716  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fdiv, x86_mode_E, 2, in);
717 
718  /* flags */
719  arch_irn_flags_t irn_flags = arch_irn_flags_none;
720  irn_flags |= arch_irn_flag_rematerializable;
721 
722  /* init node attributes */
723  int const n_res = 1;
724  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
725  (void)attr; /* avoid potential warning */
726  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_X87, X86_SIZE_80);
727 
728  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
729  out_infos[0].req = &amd64_class_reg_req_x87;
730 
731  verify_new_node(res);
732  return optimize_node(res);
733 }
734 
735 ir_node *new_bd_amd64_fdup(dbg_info *dbgi, ir_node *block, ir_node *val, const arch_register_t *reg)
736 {
737  static arch_register_req_t const *in_reqs[] = {
738  &amd64_class_reg_req_x87,
739  };
740 
741  /* construct in array */
742  ir_node *const in[] = {
743  val,
744  };
745 
746  ir_graph *const irg = get_irn_irg(block);
747  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fdup, x86_mode_E, 1, in);
748 
749  /* flags */
750  arch_irn_flags_t irn_flags = arch_irn_flags_none;
751 
752  /* init node attributes */
753  int const n_res = 1;
754  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
755  (void)attr; /* avoid potential warning */
756  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_X87, X86_SIZE_80);
757 
758  attr->x87.reg = reg;
759  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
760  out_infos[0].req = &amd64_class_reg_req_x87;
761 
762  verify_new_node(res);
763  return optimize_node(res);
764 }
765 
766 ir_node *new_bd_amd64_fild(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
767 {
768 
769 
770  ir_graph *const irg = get_irn_irg(block);
771  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fild, mode_T, arity, in);
772 
773  /* flags */
774  arch_irn_flags_t irn_flags = arch_irn_flags_none;
775  irn_flags |= arch_irn_flag_rematerializable;
776 
777  /* init node attributes */
778  int const n_res = 3;
779  amd64_x87_addr_attr_t *const attr = (amd64_x87_addr_attr_t*)get_irn_generic_attr(res);
780  (void)attr; /* avoid potential warning */
781  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
782  attr->base.addr = addr;
783 
784  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
785  out_infos[0].req = &amd64_class_reg_req_x87;
786  out_infos[1].req = &arch_no_requirement;
787  out_infos[2].req = &arch_memory_requirement;
788 
789  verify_new_node(res);
790  return optimize_node(res);
791 }
792 
793 ir_node *new_bd_amd64_fisttp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
794 {
795 
796 
797  ir_graph *const irg = get_irn_irg(block);
798  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fisttp, mode_M, arity, in);
799 
800  /* flags */
801  arch_irn_flags_t irn_flags = arch_irn_flags_none;
802 
803  /* init node attributes */
804  int const n_res = 1;
805  amd64_x87_binop_addr_attr_t *const attr = (amd64_x87_binop_addr_attr_t*)get_irn_generic_attr(res);
806  (void)attr; /* avoid potential warning */
807  be_info_init_irn(res, irn_flags, in_reqs, n_res);
808  attr->base = *attr_init;
809  assert(attr_init->base.base.op_mode == AMD64_OP_ADDR_REG);
810  attr->base.base.base.op_mode = AMD64_OP_X87_ADDR_REG;
811 
812  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
813  out_infos[0].req = &arch_memory_requirement;
814 
815  verify_new_node(res);
816  return optimize_node(res);
817 }
818 
819 ir_node *new_bd_amd64_fld(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
820 {
821 
822 
823  ir_graph *const irg = get_irn_irg(block);
824  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fld, mode_T, arity, in);
825 
826  /* flags */
827  arch_irn_flags_t irn_flags = arch_irn_flags_none;
828  irn_flags |= arch_irn_flag_rematerializable;
829 
830  /* init node attributes */
831  int const n_res = 3;
832  amd64_x87_addr_attr_t *const attr = (amd64_x87_addr_attr_t*)get_irn_generic_attr(res);
833  (void)attr; /* avoid potential warning */
834  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
835  attr->base.addr = addr;
836 
837  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
838  out_infos[0].req = &amd64_class_reg_req_x87;
839  out_infos[1].req = &arch_no_requirement;
840  out_infos[2].req = &arch_memory_requirement;
841 
842  verify_new_node(res);
843  return optimize_node(res);
844 }
845 
846 ir_node *new_bd_amd64_fld1(dbg_info *dbgi, ir_node *block)
847 {
848  arch_register_req_t const **const in_reqs = NULL;
849 
850 
851  ir_graph *const irg = get_irn_irg(block);
852  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fld1, x86_mode_E, 0, NULL);
853 
854  /* flags */
855  arch_irn_flags_t irn_flags = arch_irn_flags_none;
856  irn_flags |= arch_irn_flag_rematerializable;
857 
858  /* init node attributes */
859  int const n_res = 1;
860  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
861  (void)attr; /* avoid potential warning */
862  amd64_op_mode_t op_mode = AMD64_OP_X87;
863 x86_insn_size_t size = X86_SIZE_80;
864 
865  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
866  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
867  out_infos[0].req = &amd64_class_reg_req_x87;
868 
869  verify_new_node(res);
870  return optimize_node(res);
871 }
872 
873 ir_node *new_bd_amd64_fldz(dbg_info *dbgi, ir_node *block)
874 {
875  arch_register_req_t const **const in_reqs = NULL;
876 
877 
878  ir_graph *const irg = get_irn_irg(block);
879  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fldz, x86_mode_E, 0, NULL);
880 
881  /* flags */
882  arch_irn_flags_t irn_flags = arch_irn_flags_none;
883  irn_flags |= arch_irn_flag_rematerializable;
884 
885  /* init node attributes */
886  int const n_res = 1;
887  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
888  (void)attr; /* avoid potential warning */
889  amd64_op_mode_t op_mode = AMD64_OP_X87;
890 x86_insn_size_t size = X86_SIZE_80;
891 
892  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
893  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
894  out_infos[0].req = &amd64_class_reg_req_x87;
895 
896  verify_new_node(res);
897  return optimize_node(res);
898 }
899 
900 ir_node *new_bd_amd64_fmul(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
901 {
902  static arch_register_req_t const *in_reqs[] = {
903  &amd64_class_reg_req_x87,
904  &amd64_class_reg_req_x87,
905  };
906 
907  /* construct in array */
908  ir_node *const in[] = {
909  left,
910  right,
911  };
912 
913  ir_graph *const irg = get_irn_irg(block);
914  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fmul, x86_mode_E, 2, in);
915 
916  /* flags */
917  arch_irn_flags_t irn_flags = arch_irn_flags_none;
918  irn_flags |= arch_irn_flag_rematerializable;
919 
920  /* init node attributes */
921  int const n_res = 1;
922  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
923  (void)attr; /* avoid potential warning */
924  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_X87, X86_SIZE_80);
925 
926  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
927  out_infos[0].req = &amd64_class_reg_req_x87;
928 
929  verify_new_node(res);
930  return optimize_node(res);
931 }
932 
933 ir_node *new_bd_amd64_fpop(dbg_info *dbgi, ir_node *block, const arch_register_t *reg)
934 {
935  arch_register_req_t const **const in_reqs = NULL;
936 
937 
938  ir_graph *const irg = get_irn_irg(block);
939  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fpop, mode_ANY, 0, NULL);
940 
941  /* flags */
942  arch_irn_flags_t irn_flags = arch_irn_flags_none;
943 
944  /* init node attributes */
945  int const n_res = 1;
946  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
947  (void)attr; /* avoid potential warning */
948  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_X87, X86_SIZE_80);
949 
950  attr->x87.reg = reg;
951  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
952  out_infos[0].req = &arch_no_requirement;
953 
954  verify_new_node(res);
955  return optimize_node(res);
956 }
957 
958 ir_node *new_bd_amd64_fst(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
959 {
960 
961 
962  ir_graph *const irg = get_irn_irg(block);
963  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fst, mode_M, arity, in);
964 
965  /* flags */
966  arch_irn_flags_t irn_flags = arch_irn_flags_none;
967 
968  /* init node attributes */
969  int const n_res = 1;
970  amd64_x87_binop_addr_attr_t *const attr = (amd64_x87_binop_addr_attr_t*)get_irn_generic_attr(res);
971  (void)attr; /* avoid potential warning */
972  be_info_init_irn(res, irn_flags, in_reqs, n_res);
973  attr->base = *attr_init;
974  assert(attr_init->base.base.op_mode == AMD64_OP_ADDR_REG);
975  attr->base.base.base.op_mode = AMD64_OP_X87_ADDR_REG;
976 
977  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
978  out_infos[0].req = &arch_memory_requirement;
979 
980  verify_new_node(res);
981  return optimize_node(res);
982 }
983 
984 ir_node *new_bd_amd64_fstp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
985 {
986 
987 
988  ir_graph *const irg = get_irn_irg(block);
989  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fstp, mode_M, arity, in);
990 
991  /* flags */
992  arch_irn_flags_t irn_flags = arch_irn_flags_none;
993 
994  /* init node attributes */
995  int const n_res = 1;
996  amd64_x87_binop_addr_attr_t *const attr = (amd64_x87_binop_addr_attr_t*)get_irn_generic_attr(res);
997  (void)attr; /* avoid potential warning */
998  be_info_init_irn(res, irn_flags, in_reqs, n_res);
999  attr->base = *attr_init;
1000  assert(attr_init->base.base.op_mode == AMD64_OP_ADDR_REG);
1001  attr->base.base.base.op_mode = AMD64_OP_X87_ADDR_REG;
1002 
1003  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1004  out_infos[0].req = &arch_memory_requirement;
1005 
1006  verify_new_node(res);
1007  return optimize_node(res);
1008 }
1009 
1010 ir_node *new_bd_amd64_fsub(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
1011 {
1012  static arch_register_req_t const *in_reqs[] = {
1013  &amd64_class_reg_req_x87,
1014  &amd64_class_reg_req_x87,
1015  };
1016 
1017  /* construct in array */
1018  ir_node *const in[] = {
1019  left,
1020  right,
1021  };
1022 
1023  ir_graph *const irg = get_irn_irg(block);
1024  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fsub, x86_mode_E, 2, in);
1025 
1026  /* flags */
1027  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1028  irn_flags |= arch_irn_flag_rematerializable;
1029 
1030  /* init node attributes */
1031  int const n_res = 1;
1032  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
1033  (void)attr; /* avoid potential warning */
1034  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_X87, X86_SIZE_80);
1035 
1036  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1037  out_infos[0].req = &amd64_class_reg_req_x87;
1038 
1039  verify_new_node(res);
1040  return optimize_node(res);
1041 }
1042 
1043 ir_node *new_bd_amd64_fucomi(dbg_info *dbgi, ir_node *block, ir_node *left, ir_node *right)
1044 {
1045  static arch_register_req_t const *in_reqs[] = {
1046  &amd64_class_reg_req_x87,
1047  &amd64_class_reg_req_x87,
1048  };
1049 
1050  /* construct in array */
1051  ir_node *const in[] = {
1052  left,
1053  right,
1054  };
1055 
1056  ir_graph *const irg = get_irn_irg(block);
1057  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fucomi, mode_Iu, 2, in);
1058 
1059  /* flags */
1060  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1061  irn_flags |= arch_irn_flag_rematerializable;
1062 
1063  /* init node attributes */
1064  int const n_res = 1;
1065  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
1066  (void)attr; /* avoid potential warning */
1067  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_X87, X86_SIZE_80);
1068 
1069  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1070  out_infos[0].req = &amd64_class_reg_req_flags;
1071 
1072  verify_new_node(res);
1073  return optimize_node(res);
1074 }
1075 
1076 ir_node *new_bd_amd64_fxch(dbg_info *dbgi, ir_node *block, const arch_register_t *reg)
1077 {
1078  arch_register_req_t const **const in_reqs = NULL;
1079 
1080 
1081  ir_graph *const irg = get_irn_irg(block);
1082  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_fxch, mode_ANY, 0, NULL);
1083 
1084  /* flags */
1085  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1086 
1087  /* init node attributes */
1088  int const n_res = 1;
1089  amd64_x87_attr_t *const attr = (amd64_x87_attr_t*)get_irn_generic_attr(res);
1090  (void)attr; /* avoid potential warning */
1091  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_X87, X86_SIZE_80);
1092 
1093  attr->x87.reg = reg;
1094  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1095  out_infos[0].req = &arch_no_requirement;
1096 
1097  verify_new_node(res);
1098  return optimize_node(res);
1099 }
1100 
1101 ir_node *new_bd_amd64_haddpd(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1102 {
1103 
1104 
1105  ir_graph *const irg = get_irn_irg(block);
1106  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_haddpd, mode_T, arity, in);
1107 
1108  /* flags */
1109  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1110  irn_flags |= arch_irn_flag_rematerializable;
1111 
1112  /* init node attributes */
1113  int const n_res = 3;
1114  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1115  (void)attr; /* avoid potential warning */
1116  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1117  *attr = *attr_init;
1118  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1119  out_infos[0].req = &amd64_class_reg_req_xmm;
1120  out_infos[1].req = &arch_no_requirement;
1121  out_infos[2].req = &arch_memory_requirement;
1122 
1123  verify_new_node(res);
1124  return optimize_node(res);
1125 }
1126 
1127 ir_node *new_bd_amd64_idiv(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size)
1128 {
1129 
1130 
1131  ir_graph *const irg = get_irn_irg(block);
1132  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_idiv, mode_T, arity, in);
1133 
1134  /* flags */
1135  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1136  irn_flags |= arch_irn_flag_modify_flags;
1137 
1138  /* init node attributes */
1139  int const n_res = 4;
1140  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1141  (void)attr; /* avoid potential warning */
1142  x86_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };
1143 amd64_op_mode_t op_mode = AMD64_OP_REG;
1144 
1145  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1146  attr->addr = addr;
1147  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1148  out_infos[0].req = &amd64_single_reg_req_gp_rax;
1149  out_infos[1].req = &amd64_class_reg_req_flags;
1150  out_infos[2].req = &arch_memory_requirement;
1151  out_infos[3].req = &amd64_single_reg_req_gp_rdx;
1152 
1153  verify_new_node(res);
1154  return optimize_node(res);
1155 }
1156 
1157 ir_node *new_bd_amd64_ijmp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1158 {
1159 
1160 
1161  ir_graph *const irg = get_irn_irg(block);
1162  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_ijmp, mode_T, arity, in);
1163 
1164  /* flags */
1165  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1166 
1167  /* init node attributes */
1168  int const n_res = 3;
1169  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1170  (void)attr; /* avoid potential warning */
1171  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1172  attr->addr = addr;
1173  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1174  out_infos[0].req = &arch_exec_requirement;
1175  out_infos[1].req = &arch_no_requirement;
1176  out_infos[2].req = &arch_memory_requirement;
1177 
1178  verify_new_node(res);
1179  return optimize_node(res);
1180 }
1181 
1182 ir_node *new_bd_amd64_imul(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1183 {
1184 
1185 
1186  ir_graph *const irg = get_irn_irg(block);
1187  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_imul, mode_T, arity, in);
1188 
1189  /* flags */
1190  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1191  irn_flags |= arch_irn_flag_modify_flags;
1192  irn_flags |= arch_irn_flag_rematerializable;
1193  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
1194 
1195  /* init node attributes */
1196  int const n_res = 3;
1197  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1198  (void)attr; /* avoid potential warning */
1199  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1200  *attr = *attr_init;
1201  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1202  out_infos[0].req = &amd64_class_reg_req_gp;
1203  out_infos[1].req = &amd64_class_reg_req_flags;
1204  out_infos[2].req = &arch_memory_requirement;
1205 
1206  verify_new_node(res);
1207  return optimize_node(res);
1208 }
1209 
1210 ir_node *new_bd_amd64_imul_1op(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1211 {
1212 
1213 
1214  ir_graph *const irg = get_irn_irg(block);
1215  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_imul_1op, mode_T, arity, in);
1216 
1217  /* flags */
1218  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1219  irn_flags |= arch_irn_flag_modify_flags;
1220 
1221  /* init node attributes */
1222  int const n_res = 4;
1223  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1224  (void)attr; /* avoid potential warning */
1225  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1226  attr->addr = addr;
1227  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1228  out_infos[0].req = &amd64_single_reg_req_gp_rax;
1229  out_infos[1].req = &amd64_class_reg_req_flags;
1230  out_infos[2].req = &arch_memory_requirement;
1231  out_infos[3].req = &amd64_single_reg_req_gp_rdx;
1232 
1233  verify_new_node(res);
1234  return optimize_node(res);
1235 }
1236 
1237 ir_node *new_bd_amd64_jcc(dbg_info *dbgi, ir_node *block, ir_node *eflags, x86_condition_code_t cc)
1238 {
1239  static arch_register_req_t const *in_reqs[] = {
1240  &amd64_single_reg_req_flags_eflags,
1241  };
1242 
1243  /* construct in array */
1244  ir_node *const in[] = {
1245  eflags,
1246  };
1247 
1248  ir_graph *const irg = get_irn_irg(block);
1249  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_jcc, mode_T, 1, in);
1250 
1251  /* flags */
1252  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1253 
1254  /* init node attributes */
1255  int const n_res = 2;
1256  amd64_cc_attr_t *const attr = (amd64_cc_attr_t*)get_irn_generic_attr(res);
1257  (void)attr; /* avoid potential warning */
1258  x86_insn_size_t size = X86_SIZE_64;
1259  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_CC, size);
1260  init_amd64_cc_attributes(res, cc);
1261  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1262  out_infos[0].req = &arch_exec_requirement;
1263  out_infos[1].req = &arch_exec_requirement;
1264 
1265  verify_new_node(res);
1266  return optimize_node(res);
1267 }
1268 
1269 ir_node *new_bd_amd64_jmp(dbg_info *dbgi, ir_node *block)
1270 {
1271  arch_register_req_t const **const in_reqs = NULL;
1272 
1273 
1274  ir_graph *const irg = get_irn_irg(block);
1275  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_jmp, mode_X, 0, NULL);
1276 
1277  /* flags */
1278  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1279  irn_flags |= arch_irn_flag_simple_jump;
1280 
1281  /* init node attributes */
1282  int const n_res = 1;
1283  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
1284  (void)attr; /* avoid potential warning */
1285  amd64_op_mode_t op_mode = AMD64_OP_NONE;
1286 x86_insn_size_t size = X86_SIZE_64;
1287 
1288  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1289  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1290  out_infos[0].req = &arch_exec_requirement;
1291 
1292  verify_new_node(res);
1293  return optimize_node(res);
1294 }
1295 
1296 ir_node *new_bd_amd64_jmp_switch(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, int n_res, amd64_op_mode_t op_mode, x86_insn_size_t size, const x86_addr_t *addr, const ir_switch_table *table, ir_entity *table_entity)
1297 {
1298 
1299 
1300  ir_graph *const irg = get_irn_irg(block);
1301  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_jmp_switch, mode_T, arity, in);
1302 
1303  /* flags */
1304  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1305 
1306  /* init node attributes */
1307  amd64_switch_jmp_attr_t *const attr = (amd64_switch_jmp_attr_t*)get_irn_generic_attr(res);
1308  (void)attr; /* avoid potential warning */
1309  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1310  attr->base.addr = *addr;
1311  be_switch_attr_init(res, &attr->swtch, table, table_entity);
1312 
1313  verify_new_node(res);
1314  return optimize_node(res);
1315 }
1316 
1317 ir_node *new_bd_amd64_l_haddpd(dbg_info *dbgi, ir_node *block, ir_node *arg0, ir_node *arg1)
1318 {
1319 
1320  /* construct in array */
1321  ir_node *const in[] = {
1322  arg0,
1323  arg1,
1324  };
1325 
1326  ir_graph *const irg = get_irn_irg(block);
1327  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_l_haddpd, amd64_mode_xmm, 2, in);
1328 
1329  /* flags */
1330  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1331 
1332  /* init node attributes */
1333  int const n_res = 1;
1334  (void)irn_flags, (void)n_res;
1335 
1336  verify_new_node(res);
1337  return optimize_node(res);
1338 }
1339 
1340 ir_node *new_bd_amd64_l_punpckldq(dbg_info *dbgi, ir_node *block, ir_node *arg0, ir_node *arg1)
1341 {
1342 
1343  /* construct in array */
1344  ir_node *const in[] = {
1345  arg0,
1346  arg1,
1347  };
1348 
1349  ir_graph *const irg = get_irn_irg(block);
1350  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_l_punpckldq, amd64_mode_xmm, 2, in);
1351 
1352  /* flags */
1353  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1354 
1355  /* init node attributes */
1356  int const n_res = 1;
1357  (void)irn_flags, (void)n_res;
1358 
1359  verify_new_node(res);
1360  return optimize_node(res);
1361 }
1362 
1363 ir_node *new_bd_amd64_l_subpd(dbg_info *dbgi, ir_node *block, ir_node *arg0, ir_node *arg1)
1364 {
1365 
1366  /* construct in array */
1367  ir_node *const in[] = {
1368  arg0,
1369  arg1,
1370  };
1371 
1372  ir_graph *const irg = get_irn_irg(block);
1373  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_l_subpd, amd64_mode_xmm, 2, in);
1374 
1375  /* flags */
1376  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1377 
1378  /* init node attributes */
1379  int const n_res = 1;
1380  (void)irn_flags, (void)n_res;
1381 
1382  verify_new_node(res);
1383  return optimize_node(res);
1384 }
1385 
1386 ir_node *new_bd_amd64_lea(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, x86_addr_t addr)
1387 {
1388 
1389 
1390  ir_graph *const irg = get_irn_irg(block);
1391  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_lea, mode_Lu, arity, in);
1392 
1393  /* flags */
1394  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1395  irn_flags |= arch_irn_flag_rematerializable;
1396 
1397  /* init node attributes */
1398  int const n_res = 1;
1399  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1400  (void)attr; /* avoid potential warning */
1401  amd64_op_mode_t op_mode = AMD64_OP_ADDR;
1402 
1403  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1404  attr->addr = addr;
1405  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1406  out_infos[0].req = &amd64_class_reg_req_gp;
1407 
1408  verify_new_node(res);
1409  return optimize_node(res);
1410 }
1411 
1412 ir_node *new_bd_amd64_leave(dbg_info *dbgi, ir_node *block, ir_node *op0, ir_node *op1)
1413 {
1414  static arch_register_req_t const *in_reqs[] = {
1415  &amd64_single_reg_req_gp_rbp,
1416  &arch_memory_requirement,
1417  };
1418 
1419  /* construct in array */
1420  ir_node *const in[] = {
1421  op0,
1422  op1,
1423  };
1424 
1425  ir_graph *const irg = get_irn_irg(block);
1426  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_leave, mode_T, 2, in);
1427 
1428  /* flags */
1429  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1430 
1431  /* init node attributes */
1432  int const n_res = 3;
1433  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
1434  (void)attr; /* avoid potential warning */
1435  amd64_op_mode_t op_mode = AMD64_OP_NONE;
1436 x86_insn_size_t size = X86_SIZE_64;
1437 
1438  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1439  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1440  out_infos[0].req = &amd64_requirements_gp_rbp_I;
1441  out_infos[1].req = &arch_memory_requirement;
1442  out_infos[2].req = &amd64_requirements_gp_rsp_I;
1443 
1444  verify_new_node(res);
1445  return optimize_node(res);
1446 }
1447 
1448 ir_node *new_bd_amd64_mov_gp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1449 {
1450 
1451 
1452  ir_graph *const irg = get_irn_irg(block);
1453  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_mov_gp, mode_T, arity, in);
1454 
1455  /* flags */
1456  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1457 
1458  /* init node attributes */
1459  int const n_res = 3;
1460  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1461  (void)attr; /* avoid potential warning */
1462  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1463  attr->addr = addr;
1464  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1465  out_infos[0].req = &amd64_class_reg_req_gp;
1466  out_infos[1].req = &arch_no_requirement;
1467  out_infos[2].req = &arch_memory_requirement;
1468 
1469  verify_new_node(res);
1470  return optimize_node(res);
1471 }
1472 
1473 ir_node *new_bd_amd64_mov_imm(dbg_info *dbgi, ir_node *block, x86_insn_size_t size, const amd64_imm64_t *imm)
1474 {
1475  arch_register_req_t const **const in_reqs = NULL;
1476 
1477 
1478  ir_graph *const irg = get_irn_irg(block);
1479  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_mov_imm, mode_Lu, 0, NULL);
1480 
1481  /* flags */
1482  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1483  irn_flags |= arch_irn_flag_rematerializable;
1484 
1485  /* init node attributes */
1486  int const n_res = 1;
1487  amd64_movimm_attr_t *const attr = (amd64_movimm_attr_t*)get_irn_generic_attr(res);
1488  (void)attr; /* avoid potential warning */
1489  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_IMM64, size);
1490  init_amd64_movimm_attributes(res, imm);
1491  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1492  out_infos[0].req = &amd64_class_reg_req_gp;
1493 
1494  verify_new_node(res);
1495  return optimize_node(res);
1496 }
1497 
1498 ir_node *new_bd_amd64_mov_store(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1499 {
1500 
1501 
1502  ir_graph *const irg = get_irn_irg(block);
1503  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_mov_store, mode_M, arity, in);
1504 
1505  /* flags */
1506  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1507 
1508  /* init node attributes */
1509  int const n_res = 1;
1510  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1511  (void)attr; /* avoid potential warning */
1512  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1513  *attr = *attr_init;
1514  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1515  out_infos[0].req = &arch_memory_requirement;
1516 
1517  verify_new_node(res);
1518  return optimize_node(res);
1519 }
1520 
1521 ir_node *new_bd_amd64_movd(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, amd64_op_mode_t op_mode, x86_addr_t addr)
1522 {
1523 
1524 
1525  ir_graph *const irg = get_irn_irg(block);
1526  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movd, mode_T, arity, in);
1527 
1528  /* flags */
1529  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1530 
1531  /* init node attributes */
1532  int const n_res = 3;
1533  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1534  (void)attr; /* avoid potential warning */
1535  x86_insn_size_t size = X86_SIZE_64;
1536 
1537  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1538  attr->addr = addr;
1539  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1540  out_infos[0].req = &amd64_class_reg_req_xmm;
1541  out_infos[1].req = &arch_no_requirement;
1542  out_infos[2].req = &arch_memory_requirement;
1543 
1544  verify_new_node(res);
1545  return optimize_node(res);
1546 }
1547 
1548 ir_node *new_bd_amd64_movd_gp_xmm(dbg_info *dbgi, ir_node *block, ir_node *operand, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1549 {
1550  static arch_register_req_t const *in_reqs[] = {
1551  &amd64_class_reg_req_gp,
1552  };
1553 
1554  /* construct in array */
1555  ir_node *const in[] = {
1556  operand,
1557  };
1558 
1559  ir_graph *const irg = get_irn_irg(block);
1560  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movd_gp_xmm, amd64_mode_xmm, 1, in);
1561 
1562  /* flags */
1563  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1564 
1565  /* init node attributes */
1566  int const n_res = 1;
1567  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1568  (void)attr; /* avoid potential warning */
1569  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1570  attr->addr = addr;
1571  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1572  out_infos[0].req = &amd64_class_reg_req_xmm;
1573 
1574  verify_new_node(res);
1575  return optimize_node(res);
1576 }
1577 
1578 ir_node *new_bd_amd64_movd_xmm_gp(dbg_info *dbgi, ir_node *block, ir_node *operand, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1579 {
1580  static arch_register_req_t const *in_reqs[] = {
1581  &amd64_class_reg_req_xmm,
1582  };
1583 
1584  /* construct in array */
1585  ir_node *const in[] = {
1586  operand,
1587  };
1588 
1589  ir_graph *const irg = get_irn_irg(block);
1590  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movd_xmm_gp, mode_Lu, 1, in);
1591 
1592  /* flags */
1593  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1594 
1595  /* init node attributes */
1596  int const n_res = 1;
1597  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1598  (void)attr; /* avoid potential warning */
1599  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1600  attr->addr = addr;
1601  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1602  out_infos[0].req = &amd64_class_reg_req_gp;
1603 
1604  verify_new_node(res);
1605  return optimize_node(res);
1606 }
1607 
1608 ir_node *new_bd_amd64_movdqa(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, amd64_op_mode_t op_mode, x86_addr_t addr)
1609 {
1610 
1611 
1612  ir_graph *const irg = get_irn_irg(block);
1613  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movdqa, mode_T, arity, in);
1614 
1615  /* flags */
1616  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1617 
1618  /* init node attributes */
1619  int const n_res = 3;
1620  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1621  (void)attr; /* avoid potential warning */
1622  x86_insn_size_t size = X86_SIZE_128;
1623 
1624  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1625  attr->addr = addr;
1626  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1627  out_infos[0].req = &amd64_class_reg_req_xmm;
1628  out_infos[1].req = &arch_no_requirement;
1629  out_infos[2].req = &arch_memory_requirement;
1630 
1631  verify_new_node(res);
1632  return optimize_node(res);
1633 }
1634 
1635 ir_node *new_bd_amd64_movdqu(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, amd64_op_mode_t op_mode, x86_addr_t addr)
1636 {
1637 
1638 
1639  ir_graph *const irg = get_irn_irg(block);
1640  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movdqu, mode_T, arity, in);
1641 
1642  /* flags */
1643  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1644 
1645  /* init node attributes */
1646  int const n_res = 3;
1647  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1648  (void)attr; /* avoid potential warning */
1649  x86_insn_size_t size = X86_SIZE_128;
1650 
1651  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1652  attr->addr = addr;
1653  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1654  out_infos[0].req = &amd64_class_reg_req_xmm;
1655  out_infos[1].req = &arch_no_requirement;
1656  out_infos[2].req = &arch_memory_requirement;
1657 
1658  verify_new_node(res);
1659  return optimize_node(res);
1660 }
1661 
1662 ir_node *new_bd_amd64_movdqu_store(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1663 {
1664 
1665 
1666  ir_graph *const irg = get_irn_irg(block);
1667  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movdqu_store, mode_M, arity, in);
1668 
1669  /* flags */
1670  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1671 
1672  /* init node attributes */
1673  int const n_res = 1;
1674  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1675  (void)attr; /* avoid potential warning */
1676  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1677  *attr = *attr_init;
1678  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1679  out_infos[0].req = &arch_memory_requirement;
1680 
1681  verify_new_node(res);
1682  return optimize_node(res);
1683 }
1684 
1685 ir_node *new_bd_amd64_movs(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1686 {
1687 
1688 
1689  ir_graph *const irg = get_irn_irg(block);
1690  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movs, mode_T, arity, in);
1691 
1692  /* flags */
1693  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1694 
1695  /* init node attributes */
1696  int const n_res = 3;
1697  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1698  (void)attr; /* avoid potential warning */
1699  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1700  attr->addr = addr;
1701  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1702  out_infos[0].req = &amd64_class_reg_req_gp;
1703  out_infos[1].req = &arch_no_requirement;
1704  out_infos[2].req = &arch_memory_requirement;
1705 
1706  verify_new_node(res);
1707  return optimize_node(res);
1708 }
1709 
1710 ir_node *new_bd_amd64_movs_store_xmm(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1711 {
1712 
1713 
1714  ir_graph *const irg = get_irn_irg(block);
1715  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movs_store_xmm, mode_M, arity, in);
1716 
1717  /* flags */
1718  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1719 
1720  /* init node attributes */
1721  int const n_res = 1;
1722  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1723  (void)attr; /* avoid potential warning */
1724  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1725  *attr = *attr_init;
1726  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1727  out_infos[0].req = &arch_memory_requirement;
1728 
1729  verify_new_node(res);
1730  return optimize_node(res);
1731 }
1732 
1733 ir_node *new_bd_amd64_movs_xmm(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1734 {
1735 
1736 
1737  ir_graph *const irg = get_irn_irg(block);
1738  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_movs_xmm, mode_T, arity, in);
1739 
1740  /* flags */
1741  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1742 
1743  /* init node attributes */
1744  int const n_res = 3;
1745  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1746  (void)attr; /* avoid potential warning */
1747  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1748  attr->addr = addr;
1749  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1750  out_infos[0].req = &amd64_class_reg_req_xmm;
1751  out_infos[1].req = &arch_no_requirement;
1752  out_infos[2].req = &arch_memory_requirement;
1753 
1754  verify_new_node(res);
1755  return optimize_node(res);
1756 }
1757 
1758 ir_node *new_bd_amd64_mul(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, amd64_op_mode_t op_mode, x86_addr_t addr)
1759 {
1760 
1761 
1762  ir_graph *const irg = get_irn_irg(block);
1763  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_mul, mode_T, arity, in);
1764 
1765  /* flags */
1766  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1767  irn_flags |= arch_irn_flag_modify_flags;
1768 
1769  /* init node attributes */
1770  int const n_res = 4;
1771  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1772  (void)attr; /* avoid potential warning */
1773  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1774  attr->addr = addr;
1775  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1776  out_infos[0].req = &amd64_single_reg_req_gp_rax;
1777  out_infos[1].req = &amd64_class_reg_req_flags;
1778  out_infos[2].req = &arch_memory_requirement;
1779  out_infos[3].req = &amd64_single_reg_req_gp_rdx;
1780 
1781  verify_new_node(res);
1782  return optimize_node(res);
1783 }
1784 
1785 ir_node *new_bd_amd64_muls(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1786 {
1787 
1788 
1789  ir_graph *const irg = get_irn_irg(block);
1790  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_muls, mode_T, arity, in);
1791 
1792  /* flags */
1793  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1794  irn_flags |= arch_irn_flag_rematerializable;
1795  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
1796 
1797  /* init node attributes */
1798  int const n_res = 3;
1799  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1800  (void)attr; /* avoid potential warning */
1801  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1802  *attr = *attr_init;
1803  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1804  out_infos[0].req = &amd64_class_reg_req_xmm;
1805  out_infos[1].req = &arch_no_requirement;
1806  out_infos[2].req = &arch_memory_requirement;
1807 
1808  verify_new_node(res);
1809  return optimize_node(res);
1810 }
1811 
1812 ir_node *new_bd_amd64_neg(dbg_info *dbgi, ir_node *block, ir_node *val, x86_insn_size_t size)
1813 {
1814  static arch_register_req_t const *in_reqs[] = {
1815  &amd64_class_reg_req_gp,
1816  };
1817 
1818  /* construct in array */
1819  ir_node *const in[] = {
1820  val,
1821  };
1822 
1823  ir_graph *const irg = get_irn_irg(block);
1824  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_neg, mode_T, 1, in);
1825 
1826  /* flags */
1827  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1828  irn_flags |= arch_irn_flag_modify_flags;
1829  irn_flags |= arch_irn_flag_rematerializable;
1830 
1831  /* init node attributes */
1832  int const n_res = 2;
1833  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1834  (void)attr; /* avoid potential warning */
1835  amd64_op_mode_t op_mode = AMD64_OP_REG;
1836 x86_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };
1837  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1838  attr->addr = addr;
1839  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1840  out_infos[0].req = &amd64_requirements_gp_in_r0;
1841  out_infos[1].req = &amd64_class_reg_req_flags;
1842 
1843  verify_new_node(res);
1844  return optimize_node(res);
1845 }
1846 
1847 ir_node *new_bd_amd64_not(dbg_info *dbgi, ir_node *block, ir_node *val, x86_insn_size_t size)
1848 {
1849  static arch_register_req_t const *in_reqs[] = {
1850  &amd64_class_reg_req_gp,
1851  };
1852 
1853  /* construct in array */
1854  ir_node *const in[] = {
1855  val,
1856  };
1857 
1858  ir_graph *const irg = get_irn_irg(block);
1859  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_not, mode_T, 1, in);
1860 
1861  /* flags */
1862  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1863  irn_flags |= arch_irn_flag_modify_flags;
1864  irn_flags |= arch_irn_flag_rematerializable;
1865 
1866  /* init node attributes */
1867  int const n_res = 2;
1868  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1869  (void)attr; /* avoid potential warning */
1870  amd64_op_mode_t op_mode = AMD64_OP_REG;
1871 x86_addr_t addr = { .base_input = 0, .variant = X86_ADDR_REG };
1872  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1873  attr->addr = addr;
1874  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1875  out_infos[0].req = &amd64_requirements_gp_in_r0;
1876  out_infos[1].req = &amd64_class_reg_req_flags;
1877 
1878  verify_new_node(res);
1879  return optimize_node(res);
1880 }
1881 
1882 ir_node *new_bd_amd64_or(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1883 {
1884 
1885 
1886  ir_graph *const irg = get_irn_irg(block);
1887  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_or, mode_T, arity, in);
1888 
1889  /* flags */
1890  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1891  irn_flags |= arch_irn_flag_modify_flags;
1892  irn_flags |= arch_irn_flag_rematerializable;
1893  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
1894 
1895  /* init node attributes */
1896  int const n_res = 3;
1897  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1898  (void)attr; /* avoid potential warning */
1899  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1900  *attr = *attr_init;
1901  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1902  out_infos[0].req = &amd64_class_reg_req_gp;
1903  out_infos[1].req = &amd64_class_reg_req_flags;
1904  out_infos[2].req = &arch_memory_requirement;
1905 
1906  verify_new_node(res);
1907  return optimize_node(res);
1908 }
1909 
1910 ir_node *new_bd_amd64_pop_am(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, x86_addr_t addr)
1911 {
1912 
1913 
1914  ir_graph *const irg = get_irn_irg(block);
1915  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_pop_am, mode_T, arity, in);
1916 
1917  /* flags */
1918  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1919 
1920  /* init node attributes */
1921  int const n_res = 2;
1922  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1923  (void)attr; /* avoid potential warning */
1924  amd64_op_mode_t op_mode = AMD64_OP_ADDR;
1925 
1926  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1927  attr->addr = addr;
1928  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1929  out_infos[0].req = &amd64_requirements_gp_rsp_I;
1930  out_infos[1].req = &arch_memory_requirement;
1931 
1932  verify_new_node(res);
1933  return optimize_node(res);
1934 }
1935 
1936 ir_node *new_bd_amd64_punpckldq(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
1937 {
1938 
1939 
1940  ir_graph *const irg = get_irn_irg(block);
1941  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_punpckldq, mode_T, arity, in);
1942 
1943  /* flags */
1944  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1945  irn_flags |= arch_irn_flag_rematerializable;
1946 
1947  /* init node attributes */
1948  int const n_res = 3;
1949  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
1950  (void)attr; /* avoid potential warning */
1951  be_info_init_irn(res, irn_flags, in_reqs, n_res);
1952  *attr = *attr_init;
1953  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1954  out_infos[0].req = &amd64_class_reg_req_xmm;
1955  out_infos[1].req = &arch_no_requirement;
1956  out_infos[2].req = &arch_memory_requirement;
1957 
1958  verify_new_node(res);
1959  return optimize_node(res);
1960 }
1961 
1962 ir_node *new_bd_amd64_push_am(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, x86_insn_size_t size, x86_addr_t addr)
1963 {
1964 
1965 
1966  ir_graph *const irg = get_irn_irg(block);
1967  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_push_am, mode_T, arity, in);
1968 
1969  /* flags */
1970  arch_irn_flags_t irn_flags = arch_irn_flags_none;
1971 
1972  /* init node attributes */
1973  int const n_res = 2;
1974  amd64_addr_attr_t *const attr = (amd64_addr_attr_t*)get_irn_generic_attr(res);
1975  (void)attr; /* avoid potential warning */
1976  amd64_op_mode_t op_mode = AMD64_OP_ADDR;
1977 
1978  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
1979  attr->addr = addr;
1980  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
1981  out_infos[0].req = &amd64_requirements_gp_rsp_I;
1982  out_infos[1].req = &arch_memory_requirement;
1983 
1984  verify_new_node(res);
1985  return optimize_node(res);
1986 }
1987 
1988 ir_node *new_bd_amd64_push_reg(dbg_info *dbgi, ir_node *block, ir_node *stack, ir_node *mem, ir_node *val, x86_insn_size_t size)
1989 {
1990  static arch_register_req_t const *in_reqs[] = {
1991  &amd64_single_reg_req_gp_rsp,
1992  &arch_memory_requirement,
1993  &amd64_class_reg_req_gp,
1994  };
1995 
1996  /* construct in array */
1997  ir_node *const in[] = {
1998  stack,
1999  mem,
2000  val,
2001  };
2002 
2003  ir_graph *const irg = get_irn_irg(block);
2004  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_push_reg, mode_T, 3, in);
2005 
2006  /* flags */
2007  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2008 
2009  /* init node attributes */
2010  int const n_res = 2;
2011  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
2012  (void)attr; /* avoid potential warning */
2013  amd64_op_mode_t op_mode = AMD64_OP_NONE;
2014 
2015  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
2016  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2017  out_infos[0].req = &amd64_requirements_gp_rsp_I;
2018  out_infos[1].req = &arch_memory_requirement;
2019 
2020  verify_new_node(res);
2021  return optimize_node(res);
2022 }
2023 
2024 ir_node *new_bd_amd64_ret(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs)
2025 {
2026 
2027 
2028  ir_graph *const irg = get_irn_irg(block);
2029  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_ret, mode_X, arity, in);
2030 
2031  /* flags */
2032  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2033 
2034  /* init node attributes */
2035  int const n_res = 1;
2036  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
2037  (void)attr; /* avoid potential warning */
2038  amd64_op_mode_t op_mode = AMD64_OP_NONE;
2039 x86_insn_size_t size = X86_SIZE_64;
2040 
2041  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
2042  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2043  out_infos[0].req = &arch_exec_requirement;
2044 
2045  verify_new_node(res);
2046  return optimize_node(res);
2047 }
2048 
2049 ir_node *new_bd_amd64_sar(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_shift_attr_t *attr_init)
2050 {
2051 
2052 
2053  ir_graph *const irg = get_irn_irg(block);
2054  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_sar, mode_T, arity, in);
2055 
2056  /* flags */
2057  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2058  irn_flags |= arch_irn_flag_modify_flags;
2059  irn_flags |= arch_irn_flag_rematerializable;
2060 
2061  /* init node attributes */
2062  int const n_res = 2;
2063  amd64_shift_attr_t *const attr = (amd64_shift_attr_t*)get_irn_generic_attr(res);
2064  (void)attr; /* avoid potential warning */
2065  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2066  *attr = *attr_init;
2067 
2068  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2069  out_infos[0].req = &amd64_class_reg_req_gp;
2070  out_infos[1].req = &amd64_class_reg_req_flags;
2071 
2072  verify_new_node(res);
2073  return optimize_node(res);
2074 }
2075 
2076 ir_node *new_bd_amd64_sbb(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2077 {
2078 
2079 
2080  ir_graph *const irg = get_irn_irg(block);
2081  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_sbb, mode_T, arity, in);
2082 
2083  /* flags */
2084  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2085  irn_flags |= arch_irn_flag_modify_flags;
2086 
2087  /* init node attributes */
2088  int const n_res = 3;
2089  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2090  (void)attr; /* avoid potential warning */
2091  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2092  *attr = *attr_init;
2093  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2094  out_infos[0].req = &amd64_class_reg_req_gp;
2095  out_infos[1].req = &amd64_class_reg_req_flags;
2096  out_infos[2].req = &arch_memory_requirement;
2097 
2098  verify_new_node(res);
2099  return optimize_node(res);
2100 }
2101 
2102 ir_node *new_bd_amd64_setcc(dbg_info *dbgi, ir_node *block, ir_node *eflags, x86_condition_code_t cc)
2103 {
2104  static arch_register_req_t const *in_reqs[] = {
2105  &amd64_single_reg_req_flags_eflags,
2106  };
2107 
2108  /* construct in array */
2109  ir_node *const in[] = {
2110  eflags,
2111  };
2112 
2113  ir_graph *const irg = get_irn_irg(block);
2114  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_setcc, mode_Lu, 1, in);
2115 
2116  /* flags */
2117  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2118 
2119  /* init node attributes */
2120  int const n_res = 1;
2121  amd64_cc_attr_t *const attr = (amd64_cc_attr_t*)get_irn_generic_attr(res);
2122  (void)attr; /* avoid potential warning */
2123  x86_insn_size_t size = X86_SIZE_8;
2124  init_amd64_attributes(res, irn_flags, in_reqs, n_res, AMD64_OP_CC, size);
2125  init_amd64_cc_attributes(res, cc);
2126  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2127  out_infos[0].req = &amd64_class_reg_req_gp;
2128 
2129  verify_new_node(res);
2130  return optimize_node(res);
2131 }
2132 
2133 ir_node *new_bd_amd64_shl(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_shift_attr_t *attr_init)
2134 {
2135 
2136 
2137  ir_graph *const irg = get_irn_irg(block);
2138  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_shl, mode_T, arity, in);
2139 
2140  /* flags */
2141  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2142  irn_flags |= arch_irn_flag_modify_flags;
2143  irn_flags |= arch_irn_flag_rematerializable;
2144 
2145  /* init node attributes */
2146  int const n_res = 2;
2147  amd64_shift_attr_t *const attr = (amd64_shift_attr_t*)get_irn_generic_attr(res);
2148  (void)attr; /* avoid potential warning */
2149  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2150  *attr = *attr_init;
2151 
2152  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2153  out_infos[0].req = &amd64_class_reg_req_gp;
2154  out_infos[1].req = &amd64_class_reg_req_flags;
2155 
2156  verify_new_node(res);
2157  return optimize_node(res);
2158 }
2159 
2160 ir_node *new_bd_amd64_shr(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_shift_attr_t *attr_init)
2161 {
2162 
2163 
2164  ir_graph *const irg = get_irn_irg(block);
2165  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_shr, mode_T, arity, in);
2166 
2167  /* flags */
2168  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2169  irn_flags |= arch_irn_flag_modify_flags;
2170  irn_flags |= arch_irn_flag_rematerializable;
2171 
2172  /* init node attributes */
2173  int const n_res = 2;
2174  amd64_shift_attr_t *const attr = (amd64_shift_attr_t*)get_irn_generic_attr(res);
2175  (void)attr; /* avoid potential warning */
2176  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2177  *attr = *attr_init;
2178 
2179  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2180  out_infos[0].req = &amd64_class_reg_req_gp;
2181  out_infos[1].req = &amd64_class_reg_req_flags;
2182 
2183  verify_new_node(res);
2184  return optimize_node(res);
2185 }
2186 
2187 ir_node *new_bd_amd64_sub(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2188 {
2189 
2190 
2191  ir_graph *const irg = get_irn_irg(block);
2192  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_sub, mode_T, arity, in);
2193 
2194  /* flags */
2195  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2196  irn_flags |= arch_irn_flag_modify_flags;
2197  irn_flags |= arch_irn_flag_rematerializable;
2198 
2199  /* init node attributes */
2200  int const n_res = 3;
2201  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2202  (void)attr; /* avoid potential warning */
2203  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2204  *attr = *attr_init;
2205  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2206  out_infos[0].req = &amd64_class_reg_req_gp;
2207  out_infos[1].req = &amd64_class_reg_req_flags;
2208  out_infos[2].req = &arch_memory_requirement;
2209 
2210  verify_new_node(res);
2211  return optimize_node(res);
2212 }
2213 
2214 ir_node *new_bd_amd64_sub_sp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2215 {
2216 
2217 
2218  ir_graph *const irg = get_irn_irg(block);
2219  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_sub_sp, mode_T, arity, in);
2220 
2221  /* flags */
2222  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2223  irn_flags |= arch_irn_flag_modify_flags;
2224 
2225  /* init node attributes */
2226  int const n_res = 3;
2227  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2228  (void)attr; /* avoid potential warning */
2229  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2230  *attr = *attr_init;
2231  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2232  out_infos[0].req = &amd64_requirements_gp_rsp_I;
2233  out_infos[1].req = &amd64_class_reg_req_gp;
2234  out_infos[2].req = &arch_memory_requirement;
2235 
2236  verify_new_node(res);
2237  return optimize_node(res);
2238 }
2239 
2240 ir_node *new_bd_amd64_subpd(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2241 {
2242 
2243 
2244  ir_graph *const irg = get_irn_irg(block);
2245  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_subpd, mode_T, arity, in);
2246 
2247  /* flags */
2248  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2249  irn_flags |= arch_irn_flag_rematerializable;
2250 
2251  /* init node attributes */
2252  int const n_res = 3;
2253  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2254  (void)attr; /* avoid potential warning */
2255  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2256  *attr = *attr_init;
2257  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2258  out_infos[0].req = &amd64_class_reg_req_xmm;
2259  out_infos[1].req = &arch_no_requirement;
2260  out_infos[2].req = &arch_memory_requirement;
2261 
2262  verify_new_node(res);
2263  return optimize_node(res);
2264 }
2265 
2266 ir_node *new_bd_amd64_subs(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2267 {
2268 
2269 
2270  ir_graph *const irg = get_irn_irg(block);
2271  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_subs, mode_T, arity, in);
2272 
2273  /* flags */
2274  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2275  irn_flags |= arch_irn_flag_rematerializable;
2276 
2277  /* init node attributes */
2278  int const n_res = 3;
2279  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2280  (void)attr; /* avoid potential warning */
2281  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2282  *attr = *attr_init;
2283  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2284  out_infos[0].req = &amd64_class_reg_req_xmm;
2285  out_infos[1].req = &arch_no_requirement;
2286  out_infos[2].req = &arch_memory_requirement;
2287 
2288  verify_new_node(res);
2289  return optimize_node(res);
2290 }
2291 
2292 ir_node *new_bd_amd64_ucomis(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2293 {
2294 
2295 
2296  ir_graph *const irg = get_irn_irg(block);
2297  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_ucomis, mode_T, arity, in);
2298 
2299  /* flags */
2300  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2301  irn_flags |= arch_irn_flag_modify_flags;
2302  irn_flags |= arch_irn_flag_rematerializable;
2303 
2304  /* init node attributes */
2305  int const n_res = 3;
2306  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2307  (void)attr; /* avoid potential warning */
2308  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2309  *attr = *attr_init;
2310  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2311  out_infos[0].req = &arch_no_requirement;
2312  out_infos[1].req = &amd64_class_reg_req_flags;
2313  out_infos[2].req = &arch_memory_requirement;
2314 
2315  verify_new_node(res);
2316  return optimize_node(res);
2317 }
2318 
2319 ir_node *new_bd_amd64_xor(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2320 {
2321 
2322 
2323  ir_graph *const irg = get_irn_irg(block);
2324  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_xor, mode_T, arity, in);
2325 
2326  /* flags */
2327  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2328  irn_flags |= arch_irn_flag_modify_flags;
2329  irn_flags |= arch_irn_flag_rematerializable;
2330  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
2331 
2332  /* init node attributes */
2333  int const n_res = 3;
2334  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2335  (void)attr; /* avoid potential warning */
2336  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2337  *attr = *attr_init;
2338  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2339  out_infos[0].req = &amd64_class_reg_req_gp;
2340  out_infos[1].req = &amd64_class_reg_req_flags;
2341  out_infos[2].req = &arch_memory_requirement;
2342 
2343  verify_new_node(res);
2344  return optimize_node(res);
2345 }
2346 
2347 ir_node *new_bd_amd64_xor_0(dbg_info *dbgi, ir_node *block, x86_insn_size_t size)
2348 {
2349  arch_register_req_t const **const in_reqs = NULL;
2350 
2351 
2352  ir_graph *const irg = get_irn_irg(block);
2353  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_xor_0, mode_T, 0, NULL);
2354 
2355  /* flags */
2356  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2357  irn_flags |= arch_irn_flag_modify_flags;
2358  irn_flags |= arch_irn_flag_rematerializable;
2359 
2360  /* init node attributes */
2361  int const n_res = 2;
2362  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
2363  (void)attr; /* avoid potential warning */
2364  amd64_op_mode_t op_mode = AMD64_OP_NONE;
2365  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
2366  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2367  out_infos[0].req = &amd64_class_reg_req_gp;
2368  out_infos[1].req = &amd64_class_reg_req_flags;
2369 
2370  verify_new_node(res);
2371  return optimize_node(res);
2372 }
2373 
2374 ir_node *new_bd_amd64_xorp(dbg_info *dbgi, ir_node *block, int const arity, ir_node *const *const in, arch_register_req_t const **const in_reqs, const amd64_binop_addr_attr_t *attr_init)
2375 {
2376 
2377 
2378  ir_graph *const irg = get_irn_irg(block);
2379  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_xorp, mode_T, arity, in);
2380 
2381  /* flags */
2382  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2383  irn_flags |= arch_irn_flag_rematerializable;
2384  irn_flags |= (arch_irn_flags_t)amd64_arch_irn_flag_commutative_binop;
2385 
2386  /* init node attributes */
2387  int const n_res = 3;
2388  amd64_binop_addr_attr_t *const attr = (amd64_binop_addr_attr_t*)get_irn_generic_attr(res);
2389  (void)attr; /* avoid potential warning */
2390  be_info_init_irn(res, irn_flags, in_reqs, n_res);
2391  *attr = *attr_init;
2392  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2393  out_infos[0].req = &amd64_class_reg_req_xmm;
2394  out_infos[1].req = &arch_no_requirement;
2395  out_infos[2].req = &arch_memory_requirement;
2396 
2397  verify_new_node(res);
2398  return optimize_node(res);
2399 }
2400 
2401 ir_node *new_bd_amd64_xorp_0(dbg_info *dbgi, ir_node *block, x86_insn_size_t size)
2402 {
2403  arch_register_req_t const **const in_reqs = NULL;
2404 
2405 
2406  ir_graph *const irg = get_irn_irg(block);
2407  ir_node *const res = new_ir_node(dbgi, irg, block, op_amd64_xorp_0, amd64_mode_xmm, 0, NULL);
2408 
2409  /* flags */
2410  arch_irn_flags_t irn_flags = arch_irn_flags_none;
2411  irn_flags |= arch_irn_flag_rematerializable;
2412 
2413  /* init node attributes */
2414  int const n_res = 1;
2415  amd64_attr_t *const attr = (amd64_attr_t*)get_irn_generic_attr(res);
2416  (void)attr; /* avoid potential warning */
2417  amd64_op_mode_t op_mode = AMD64_OP_NONE;
2418  init_amd64_attributes(res, irn_flags, in_reqs, n_res, op_mode, size);
2419  reg_out_info_t *const out_infos = be_get_info(res)->out_infos;
2420  out_infos[0].req = &amd64_class_reg_req_xmm;
2421 
2422  verify_new_node(res);
2423  return optimize_node(res);
2424 }
2425 
2426 
2431 void amd64_create_opcodes(void)
2432 {
2433  ir_op *op;
2434  int cur_opcode = get_next_ir_opcodes(iro_amd64_last);
2435 
2436  amd64_opcode_start = cur_opcode;
2437  op = new_ir_op(cur_opcode + iro_amd64_add, "amd64_add", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2438  set_op_dump(op, amd64_dump_node);
2439  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2440  set_op_copy_attr(op, be_copy_attr);
2441  set_op_tag(op, amd64_op_tag);
2442  op_amd64_add = op;
2443  op = new_ir_op(cur_opcode + iro_amd64_adds, "amd64_adds", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2444  set_op_dump(op, amd64_dump_node);
2445  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2446  set_op_copy_attr(op, be_copy_attr);
2447  set_op_tag(op, amd64_op_tag);
2448  op_amd64_adds = op;
2449  op = new_ir_op(cur_opcode + iro_amd64_and, "amd64_and", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2450  set_op_dump(op, amd64_dump_node);
2451  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2452  set_op_copy_attr(op, be_copy_attr);
2453  set_op_tag(op, amd64_op_tag);
2454  op_amd64_and = op;
2455  op = new_ir_op(cur_opcode + iro_amd64_bsf, "amd64_bsf", op_pin_state_floats, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2456  set_op_dump(op, amd64_dump_node);
2457  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2458  set_op_copy_attr(op, be_copy_attr);
2459  set_op_tag(op, amd64_op_tag);
2460  op_amd64_bsf = op;
2461  op = new_ir_op(cur_opcode + iro_amd64_bsr, "amd64_bsr", op_pin_state_floats, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2462  set_op_dump(op, amd64_dump_node);
2463  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2464  set_op_copy_attr(op, be_copy_attr);
2465  set_op_tag(op, amd64_op_tag);
2466  op_amd64_bsr = op;
2467  op = new_ir_op(cur_opcode + iro_amd64_call, "amd64_call", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_call_addr_attr_t));
2468  set_op_dump(op, amd64_dump_node);
2469  set_op_attrs_equal(op, amd64_call_addr_attrs_equal);
2470  set_op_copy_attr(op, be_copy_attr);
2471  set_op_tag(op, amd64_op_tag);
2472  op_amd64_call = op;
2473  op = new_ir_op(cur_opcode + iro_amd64_cltd, "amd64_cltd", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_attr_t));
2474  set_op_dump(op, amd64_dump_node);
2475  set_op_attrs_equal(op, amd64_attrs_equal);
2476  set_op_copy_attr(op, be_copy_attr);
2477  set_op_tag(op, amd64_op_tag);
2478  op_amd64_cltd = op;
2479  op = new_ir_op(cur_opcode + iro_amd64_cmp, "amd64_cmp", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2480  set_op_dump(op, amd64_dump_node);
2481  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2482  set_op_copy_attr(op, be_copy_attr);
2483  set_op_tag(op, amd64_op_tag);
2484  op_amd64_cmp = op;
2485  op = new_ir_op(cur_opcode + iro_amd64_cmpxchg, "amd64_cmpxchg", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2486  set_op_dump(op, amd64_dump_node);
2487  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2488  set_op_copy_attr(op, be_copy_attr);
2489  set_op_tag(op, amd64_op_tag);
2490  op_amd64_cmpxchg = op;
2491  op = new_ir_op(cur_opcode + iro_amd64_cqto, "amd64_cqto", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_attr_t));
2492  set_op_dump(op, amd64_dump_node);
2493  set_op_attrs_equal(op, amd64_attrs_equal);
2494  set_op_copy_attr(op, be_copy_attr);
2495  set_op_tag(op, amd64_op_tag);
2496  op_amd64_cqto = op;
2497  op = new_ir_op(cur_opcode + iro_amd64_cvtsd2ss, "amd64_cvtsd2ss", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2498  set_op_dump(op, amd64_dump_node);
2499  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2500  set_op_copy_attr(op, be_copy_attr);
2501  set_op_tag(op, amd64_op_tag);
2502  op_amd64_cvtsd2ss = op;
2503  op = new_ir_op(cur_opcode + iro_amd64_cvtsi2sd, "amd64_cvtsi2sd", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2504  set_op_dump(op, amd64_dump_node);
2505  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2506  set_op_copy_attr(op, be_copy_attr);
2507  set_op_tag(op, amd64_op_tag);
2508  op_amd64_cvtsi2sd = op;
2509  op = new_ir_op(cur_opcode + iro_amd64_cvtsi2ss, "amd64_cvtsi2ss", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2510  set_op_dump(op, amd64_dump_node);
2511  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2512  set_op_copy_attr(op, be_copy_attr);
2513  set_op_tag(op, amd64_op_tag);
2514  op_amd64_cvtsi2ss = op;
2515  op = new_ir_op(cur_opcode + iro_amd64_cvtss2sd, "amd64_cvtss2sd", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2516  set_op_dump(op, amd64_dump_node);
2517  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2518  set_op_copy_attr(op, be_copy_attr);
2519  set_op_tag(op, amd64_op_tag);
2520  op_amd64_cvtss2sd = op;
2521  op = new_ir_op(cur_opcode + iro_amd64_cvttsd2si, "amd64_cvttsd2si", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2522  set_op_dump(op, amd64_dump_node);
2523  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2524  set_op_copy_attr(op, be_copy_attr);
2525  set_op_tag(op, amd64_op_tag);
2526  op_amd64_cvttsd2si = op;
2527  op = new_ir_op(cur_opcode + iro_amd64_cvttss2si, "amd64_cvttss2si", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2528  set_op_dump(op, amd64_dump_node);
2529  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2530  set_op_copy_attr(op, be_copy_attr);
2531  set_op_tag(op, amd64_op_tag);
2532  op_amd64_cvttss2si = op;
2533  op = new_ir_op(cur_opcode + iro_amd64_div, "amd64_div", op_pin_state_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2534  set_op_dump(op, amd64_dump_node);
2535  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2536  set_op_copy_attr(op, be_copy_attr);
2537  set_op_tag(op, amd64_op_tag);
2538  op_amd64_div = op;
2539  op = new_ir_op(cur_opcode + iro_amd64_divs, "amd64_divs", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2540  set_op_dump(op, amd64_dump_node);
2541  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2542  set_op_copy_attr(op, be_copy_attr);
2543  set_op_tag(op, amd64_op_tag);
2544  op_amd64_divs = op;
2545  op = new_ir_op(cur_opcode + iro_amd64_fadd, "amd64_fadd", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2546  set_op_dump(op, amd64_dump_node);
2547  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2548  set_op_copy_attr(op, be_copy_attr);
2549  set_op_tag(op, amd64_op_tag);
2550  op_amd64_fadd = op;
2551  op = new_ir_op(cur_opcode + iro_amd64_fchs, "amd64_fchs", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2552  set_op_dump(op, amd64_dump_node);
2553  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2554  set_op_copy_attr(op, be_copy_attr);
2555  set_op_tag(op, amd64_op_tag);
2556  op_amd64_fchs = op;
2557  op = new_ir_op(cur_opcode + iro_amd64_fdiv, "amd64_fdiv", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2558  set_op_dump(op, amd64_dump_node);
2559  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2560  set_op_copy_attr(op, be_copy_attr);
2561  set_op_tag(op, amd64_op_tag);
2562  op_amd64_fdiv = op;
2563  op = new_ir_op(cur_opcode + iro_amd64_fdup, "amd64_fdup", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2564  set_op_dump(op, amd64_dump_node);
2565  set_op_attrs_equal(op, attrs_equal_false);
2566  set_op_copy_attr(op, be_copy_attr);
2567  set_op_tag(op, amd64_op_tag);
2568  op_amd64_fdup = op;
2569  op = new_ir_op(cur_opcode + iro_amd64_fild, "amd64_fild", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_variable, -1, sizeof(amd64_x87_addr_attr_t));
2570  set_op_dump(op, amd64_dump_node);
2571  set_op_attrs_equal(op, amd64_x87_addr_attrs_equal);
2572  set_op_copy_attr(op, be_copy_attr);
2573  set_op_tag(op, amd64_op_tag);
2574  op_amd64_fild = op;
2575  op = new_ir_op(cur_opcode + iro_amd64_fisttp, "amd64_fisttp", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_variable, -1, sizeof(amd64_x87_binop_addr_attr_t));
2576  set_op_dump(op, amd64_dump_node);
2577  set_op_attrs_equal(op, amd64_x87_binop_addr_attrs_equal);
2578  set_op_copy_attr(op, be_copy_attr);
2579  set_op_tag(op, amd64_op_tag);
2580  op_amd64_fisttp = op;
2581  op = new_ir_op(cur_opcode + iro_amd64_fld, "amd64_fld", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_variable, -1, sizeof(amd64_x87_addr_attr_t));
2582  set_op_dump(op, amd64_dump_node);
2583  set_op_attrs_equal(op, amd64_x87_addr_attrs_equal);
2584  set_op_copy_attr(op, be_copy_attr);
2585  set_op_tag(op, amd64_op_tag);
2586  op_amd64_fld = op;
2587  op = new_ir_op(cur_opcode + iro_amd64_fld1, "amd64_fld1", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(amd64_attr_t));
2588  set_op_dump(op, amd64_dump_node);
2589  set_op_attrs_equal(op, amd64_attrs_equal);
2590  set_op_copy_attr(op, be_copy_attr);
2591  set_op_tag(op, amd64_op_tag);
2592  op_amd64_fld1 = op;
2593  op = new_ir_op(cur_opcode + iro_amd64_fldz, "amd64_fldz", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(amd64_attr_t));
2594  set_op_dump(op, amd64_dump_node);
2595  set_op_attrs_equal(op, amd64_attrs_equal);
2596  set_op_copy_attr(op, be_copy_attr);
2597  set_op_tag(op, amd64_op_tag);
2598  op_amd64_fldz = op;
2599  op = new_ir_op(cur_opcode + iro_amd64_fmul, "amd64_fmul", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2600  set_op_dump(op, amd64_dump_node);
2601  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2602  set_op_copy_attr(op, be_copy_attr);
2603  set_op_tag(op, amd64_op_tag);
2604  op_amd64_fmul = op;
2605  op = new_ir_op(cur_opcode + iro_amd64_fpop, "amd64_fpop", op_pin_state_floats, irop_flag_keep, oparity_any, -1, sizeof(amd64_x87_attr_t));
2606  set_op_dump(op, amd64_dump_node);
2607  set_op_attrs_equal(op, attrs_equal_false);
2608  set_op_copy_attr(op, be_copy_attr);
2609  set_op_tag(op, amd64_op_tag);
2610  op_amd64_fpop = op;
2611  op = new_ir_op(cur_opcode + iro_amd64_fst, "amd64_fst", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_variable, -1, sizeof(amd64_x87_binop_addr_attr_t));
2612  set_op_dump(op, amd64_dump_node);
2613  set_op_attrs_equal(op, amd64_x87_binop_addr_attrs_equal);
2614  set_op_copy_attr(op, be_copy_attr);
2615  set_op_tag(op, amd64_op_tag);
2616  op_amd64_fst = op;
2617  op = new_ir_op(cur_opcode + iro_amd64_fstp, "amd64_fstp", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_variable, -1, sizeof(amd64_x87_binop_addr_attr_t));
2618  set_op_dump(op, amd64_dump_node);
2619  set_op_attrs_equal(op, amd64_x87_binop_addr_attrs_equal);
2620  set_op_copy_attr(op, be_copy_attr);
2621  set_op_tag(op, amd64_op_tag);
2622  op_amd64_fstp = op;
2623  op = new_ir_op(cur_opcode + iro_amd64_fsub, "amd64_fsub", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2624  set_op_dump(op, amd64_dump_node);
2625  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2626  set_op_copy_attr(op, be_copy_attr);
2627  set_op_tag(op, amd64_op_tag);
2628  op_amd64_fsub = op;
2629  op = new_ir_op(cur_opcode + iro_amd64_fucomi, "amd64_fucomi", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_x87_attr_t));
2630  set_op_dump(op, amd64_dump_node);
2631  set_op_attrs_equal(op, amd64_x87_attrs_equal);
2632  set_op_copy_attr(op, be_copy_attr);
2633  set_op_tag(op, amd64_op_tag);
2634  op_amd64_fucomi = op;
2635  op = new_ir_op(cur_opcode + iro_amd64_fxch, "amd64_fxch", op_pin_state_floats, irop_flag_keep, oparity_any, -1, sizeof(amd64_x87_attr_t));
2636  set_op_dump(op, amd64_dump_node);
2637  set_op_attrs_equal(op, attrs_equal_false);
2638  set_op_copy_attr(op, be_copy_attr);
2639  set_op_tag(op, amd64_op_tag);
2640  op_amd64_fxch = op;
2641  op = new_ir_op(cur_opcode + iro_amd64_haddpd, "amd64_haddpd", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2642  set_op_dump(op, amd64_dump_node);
2643  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2644  set_op_copy_attr(op, be_copy_attr);
2645  set_op_tag(op, amd64_op_tag);
2646  op_amd64_haddpd = op;
2647  op = new_ir_op(cur_opcode + iro_amd64_idiv, "amd64_idiv", op_pin_state_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2648  set_op_dump(op, amd64_dump_node);
2649  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2650  set_op_copy_attr(op, be_copy_attr);
2651  set_op_tag(op, amd64_op_tag);
2652  op_amd64_idiv = op;
2653  op = new_ir_op(cur_opcode + iro_amd64_ijmp, "amd64_ijmp", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_unknown_jump, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2654  set_op_dump(op, amd64_dump_node);
2655  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2656  set_op_copy_attr(op, be_copy_attr);
2657  set_op_tag(op, amd64_op_tag);
2658  op_amd64_ijmp = op;
2659  op = new_ir_op(cur_opcode + iro_amd64_imul, "amd64_imul", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2660  set_op_dump(op, amd64_dump_node);
2661  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2662  set_op_copy_attr(op, be_copy_attr);
2663  set_op_tag(op, amd64_op_tag);
2664  op_amd64_imul = op;
2665  op = new_ir_op(cur_opcode + iro_amd64_imul_1op, "amd64_imul_1op", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2666  set_op_dump(op, amd64_dump_node);
2667  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2668  set_op_copy_attr(op, be_copy_attr);
2669  set_op_tag(op, amd64_op_tag);
2670  op_amd64_imul_1op = op;
2671  op = new_ir_op(cur_opcode + iro_amd64_jcc, "amd64_jcc", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_any, -1, sizeof(amd64_cc_attr_t));
2672  set_op_dump(op, amd64_dump_node);
2673  set_op_attrs_equal(op, amd64_cc_attrs_equal);
2674  set_op_copy_attr(op, be_copy_attr);
2675  set_op_tag(op, amd64_op_tag);
2676  op_amd64_jcc = op;
2677  op = new_ir_op(cur_opcode + iro_amd64_jmp, "amd64_jmp", op_pin_state_pinned, irop_flag_cfopcode, oparity_any, -1, sizeof(amd64_attr_t));
2678  set_op_dump(op, amd64_dump_node);
2679  set_op_attrs_equal(op, amd64_attrs_equal);
2680  set_op_copy_attr(op, be_copy_attr);
2681  set_op_tag(op, amd64_op_tag);
2682  op_amd64_jmp = op;
2683  op = new_ir_op(cur_opcode + iro_amd64_jmp_switch, "amd64_jmp_switch", op_pin_state_pinned, irop_flag_cfopcode|irop_flag_forking, oparity_variable, -1, sizeof(amd64_switch_jmp_attr_t));
2684  set_op_dump(op, amd64_dump_node);
2685  set_op_attrs_equal(op, amd64_switch_jmp_attrs_equal);
2686  set_op_copy_attr(op, be_copy_attr);
2687  set_op_tag(op, amd64_op_tag);
2688  op_amd64_jmp_switch = op;
2689  op = new_ir_op(cur_opcode + iro_amd64_l_haddpd, "amd64_l_haddpd", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
2690  set_op_dump(op, NULL);
2691  set_op_tag(op, amd64_op_tag);
2692  op_amd64_l_haddpd = op;
2693  op = new_ir_op(cur_opcode + iro_amd64_l_punpckldq, "amd64_l_punpckldq", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
2694  set_op_dump(op, NULL);
2695  set_op_tag(op, amd64_op_tag);
2696  op_amd64_l_punpckldq = op;
2697  op = new_ir_op(cur_opcode + iro_amd64_l_subpd, "amd64_l_subpd", op_pin_state_floats, irop_flag_none, oparity_any, -1, 0);
2698  set_op_dump(op, NULL);
2699  set_op_tag(op, amd64_op_tag);
2700  op_amd64_l_subpd = op;
2701  op = new_ir_op(cur_opcode + iro_amd64_lea, "amd64_lea", op_pin_state_floats, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2702  set_op_dump(op, amd64_dump_node);
2703  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2704  set_op_copy_attr(op, be_copy_attr);
2705  set_op_tag(op, amd64_op_tag);
2706  op_amd64_lea = op;
2707  op = new_ir_op(cur_opcode + iro_amd64_leave, "amd64_leave", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_attr_t));
2708  set_op_dump(op, amd64_dump_node);
2709  set_op_attrs_equal(op, amd64_attrs_equal);
2710  set_op_copy_attr(op, be_copy_attr);
2711  set_op_tag(op, amd64_op_tag);
2712  op_amd64_leave = op;
2713  op = new_ir_op(cur_opcode + iro_amd64_mov_gp, "amd64_mov_gp", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2714  set_op_dump(op, amd64_dump_node);
2715  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2716  set_op_copy_attr(op, be_copy_attr);
2717  set_op_tag(op, amd64_op_tag);
2718  op_amd64_mov_gp = op;
2719  op = new_ir_op(cur_opcode + iro_amd64_mov_imm, "amd64_mov_imm", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(amd64_movimm_attr_t));
2720  set_op_dump(op, amd64_dump_node);
2721  set_op_attrs_equal(op, amd64_movimm_attrs_equal);
2722  set_op_copy_attr(op, be_copy_attr);
2723  set_op_tag(op, amd64_op_tag);
2724  op_amd64_mov_imm = op;
2725  op = new_ir_op(cur_opcode + iro_amd64_mov_store, "amd64_mov_store", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2726  set_op_dump(op, amd64_dump_node);
2727  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2728  set_op_copy_attr(op, be_copy_attr);
2729  set_op_tag(op, amd64_op_tag);
2730  op_amd64_mov_store = op;
2731  op = new_ir_op(cur_opcode + iro_amd64_movd, "amd64_movd", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2732  set_op_dump(op, amd64_dump_node);
2733  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2734  set_op_copy_attr(op, be_copy_attr);
2735  set_op_tag(op, amd64_op_tag);
2736  op_amd64_movd = op;
2737  op = new_ir_op(cur_opcode + iro_amd64_movd_gp_xmm, "amd64_movd_gp_xmm", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2738  set_op_dump(op, amd64_dump_node);
2739  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2740  set_op_copy_attr(op, be_copy_attr);
2741  set_op_tag(op, amd64_op_tag);
2742  op_amd64_movd_gp_xmm = op;
2743  op = new_ir_op(cur_opcode + iro_amd64_movd_xmm_gp, "amd64_movd_xmm_gp", op_pin_state_exc_pinned, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2744  set_op_dump(op, amd64_dump_node);
2745  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2746  set_op_copy_attr(op, be_copy_attr);
2747  set_op_tag(op, amd64_op_tag);
2748  op_amd64_movd_xmm_gp = op;
2749  op = new_ir_op(cur_opcode + iro_amd64_movdqa, "amd64_movdqa", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2750  set_op_dump(op, amd64_dump_node);
2751  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2752  set_op_copy_attr(op, be_copy_attr);
2753  set_op_tag(op, amd64_op_tag);
2754  op_amd64_movdqa = op;
2755  op = new_ir_op(cur_opcode + iro_amd64_movdqu, "amd64_movdqu", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2756  set_op_dump(op, amd64_dump_node);
2757  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2758  set_op_copy_attr(op, be_copy_attr);
2759  set_op_tag(op, amd64_op_tag);
2760  op_amd64_movdqu = op;
2761  op = new_ir_op(cur_opcode + iro_amd64_movdqu_store, "amd64_movdqu_store", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2762  set_op_dump(op, amd64_dump_node);
2763  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2764  set_op_copy_attr(op, be_copy_attr);
2765  set_op_tag(op, amd64_op_tag);
2766  op_amd64_movdqu_store = op;
2767  op = new_ir_op(cur_opcode + iro_amd64_movs, "amd64_movs", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2768  set_op_dump(op, amd64_dump_node);
2769  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2770  set_op_copy_attr(op, be_copy_attr);
2771  set_op_tag(op, amd64_op_tag);
2772  op_amd64_movs = op;
2773  op = new_ir_op(cur_opcode + iro_amd64_movs_store_xmm, "amd64_movs_store_xmm", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2774  set_op_dump(op, amd64_dump_node);
2775  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2776  set_op_copy_attr(op, be_copy_attr);
2777  set_op_tag(op, amd64_op_tag);
2778  op_amd64_movs_store_xmm = op;
2779  op = new_ir_op(cur_opcode + iro_amd64_movs_xmm, "amd64_movs_xmm", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2780  set_op_dump(op, amd64_dump_node);
2781  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2782  set_op_copy_attr(op, be_copy_attr);
2783  set_op_tag(op, amd64_op_tag);
2784  op_amd64_movs_xmm = op;
2785  op = new_ir_op(cur_opcode + iro_amd64_mul, "amd64_mul", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2786  set_op_dump(op, amd64_dump_node);
2787  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2788  set_op_copy_attr(op, be_copy_attr);
2789  set_op_tag(op, amd64_op_tag);
2790  op_amd64_mul = op;
2791  op = new_ir_op(cur_opcode + iro_amd64_muls, "amd64_muls", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2792  set_op_dump(op, amd64_dump_node);
2793  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2794  set_op_copy_attr(op, be_copy_attr);
2795  set_op_tag(op, amd64_op_tag);
2796  op_amd64_muls = op;
2797  op = new_ir_op(cur_opcode + iro_amd64_neg, "amd64_neg", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2798  set_op_dump(op, amd64_dump_node);
2799  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2800  set_op_copy_attr(op, be_copy_attr);
2801  set_op_tag(op, amd64_op_tag);
2802  op_amd64_neg = op;
2803  op = new_ir_op(cur_opcode + iro_amd64_not, "amd64_not", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_addr_attr_t));
2804  set_op_dump(op, amd64_dump_node);
2805  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2806  set_op_copy_attr(op, be_copy_attr);
2807  set_op_tag(op, amd64_op_tag);
2808  op_amd64_not = op;
2809  op = new_ir_op(cur_opcode + iro_amd64_or, "amd64_or", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2810  set_op_dump(op, amd64_dump_node);
2811  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2812  set_op_copy_attr(op, be_copy_attr);
2813  set_op_tag(op, amd64_op_tag);
2814  op_amd64_or = op;
2815  op = new_ir_op(cur_opcode + iro_amd64_pop_am, "amd64_pop_am", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2816  set_op_dump(op, amd64_dump_node);
2817  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2818  set_op_copy_attr(op, be_copy_attr);
2819  set_op_tag(op, amd64_op_tag);
2820  op_amd64_pop_am = op;
2821  op = new_ir_op(cur_opcode + iro_amd64_punpckldq, "amd64_punpckldq", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2822  set_op_dump(op, amd64_dump_node);
2823  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2824  set_op_copy_attr(op, be_copy_attr);
2825  set_op_tag(op, amd64_op_tag);
2826  op_amd64_punpckldq = op;
2827  op = new_ir_op(cur_opcode + iro_amd64_push_am, "amd64_push_am", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_variable, -1, sizeof(amd64_addr_attr_t));
2828  set_op_dump(op, amd64_dump_node);
2829  set_op_attrs_equal(op, amd64_addr_attrs_equal);
2830  set_op_copy_attr(op, be_copy_attr);
2831  set_op_tag(op, amd64_op_tag);
2832  op_amd64_push_am = op;
2833  op = new_ir_op(cur_opcode + iro_amd64_push_reg, "amd64_push_reg", op_pin_state_exc_pinned, irop_flag_uses_memory, oparity_any, -1, sizeof(amd64_attr_t));
2834  set_op_dump(op, amd64_dump_node);
2835  set_op_attrs_equal(op, amd64_attrs_equal);
2836  set_op_copy_attr(op, be_copy_attr);
2837  set_op_tag(op, amd64_op_tag);
2838  op_amd64_push_reg = op;
2839  op = new_ir_op(cur_opcode + iro_amd64_ret, "amd64_ret", op_pin_state_pinned, irop_flag_cfopcode, oparity_variable, -1, sizeof(amd64_attr_t));
2840  set_op_dump(op, amd64_dump_node);
2841  set_op_attrs_equal(op, amd64_attrs_equal);
2842  set_op_copy_attr(op, be_copy_attr);
2843  set_op_tag(op, amd64_op_tag);
2844  op_amd64_ret = op;
2845  op = new_ir_op(cur_opcode + iro_amd64_sar, "amd64_sar", op_pin_state_floats, irop_flag_none, oparity_variable, -1, sizeof(amd64_shift_attr_t));
2846  set_op_dump(op, amd64_dump_node);
2847  set_op_attrs_equal(op, amd64_shift_attrs_equal);
2848  set_op_copy_attr(op, be_copy_attr);
2849  set_op_tag(op, amd64_op_tag);
2850  op_amd64_sar = op;
2851  op = new_ir_op(cur_opcode + iro_amd64_sbb, "amd64_sbb", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2852  set_op_dump(op, amd64_dump_node);
2853  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2854  set_op_copy_attr(op, be_copy_attr);
2855  set_op_tag(op, amd64_op_tag);
2856  op_amd64_sbb = op;
2857  op = new_ir_op(cur_opcode + iro_amd64_setcc, "amd64_setcc", op_pin_state_floats, irop_flag_none, oparity_any, -1, sizeof(amd64_cc_attr_t));
2858  set_op_dump(op, amd64_dump_node);
2859  set_op_attrs_equal(op, amd64_cc_attrs_equal);
2860  set_op_copy_attr(op, be_copy_attr);
2861  set_op_tag(op, amd64_op_tag);
2862  op_amd64_setcc = op;
2863  op = new_ir_op(cur_opcode + iro_amd64_shl, "amd64_shl", op_pin_state_floats, irop_flag_none, oparity_variable, -1, sizeof(amd64_shift_attr_t));
2864  set_op_dump(op, amd64_dump_node);
2865  set_op_attrs_equal(op, amd64_shift_attrs_equal);
2866  set_op_copy_attr(op, be_copy_attr);
2867  set_op_tag(op, amd64_op_tag);
2868  op_amd64_shl = op;
2869  op = new_ir_op(cur_opcode + iro_amd64_shr, "amd64_shr", op_pin_state_floats, irop_flag_none, oparity_variable, -1, sizeof(amd64_shift_attr_t));
2870  set_op_dump(op, amd64_dump_node);
2871  set_op_attrs_equal(op, amd64_shift_attrs_equal);
2872  set_op_copy_attr(op, be_copy_attr);
2873  set_op_tag(op, amd64_op_tag);
2874  op_amd64_shr = op;
2875  op = new_ir_op(cur_opcode + iro_amd64_sub, "amd64_sub", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2876  set_op_dump(op, amd64_dump_node);
2877  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2878  set_op_copy_attr(op, be_copy_attr);
2879  set_op_tag(op, amd64_op_tag);
2880  op_amd64_sub = op;
2881  op = new_ir_op(cur_opcode + iro_amd64_sub_sp, "amd64_sub_sp", op_pin_state_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2882  set_op_dump(op, amd64_dump_node);
2883  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2884  set_op_copy_attr(op, be_copy_attr);
2885  set_op_tag(op, amd64_op_tag);
2886  op_amd64_sub_sp = op;
2887  op = new_ir_op(cur_opcode + iro_amd64_subpd, "amd64_subpd", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2888  set_op_dump(op, amd64_dump_node);
2889  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2890  set_op_copy_attr(op, be_copy_attr);
2891  set_op_tag(op, amd64_op_tag);
2892  op_amd64_subpd = op;
2893  op = new_ir_op(cur_opcode + iro_amd64_subs, "amd64_subs", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2894  set_op_dump(op, amd64_dump_node);
2895  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2896  set_op_copy_attr(op, be_copy_attr);
2897  set_op_tag(op, amd64_op_tag);
2898  op_amd64_subs = op;
2899  op = new_ir_op(cur_opcode + iro_amd64_ucomis, "amd64_ucomis", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2900  set_op_dump(op, amd64_dump_node);
2901  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2902  set_op_copy_attr(op, be_copy_attr);
2903  set_op_tag(op, amd64_op_tag);
2904  op_amd64_ucomis = op;
2905  op = new_ir_op(cur_opcode + iro_amd64_xor, "amd64_xor", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2906  set_op_dump(op, amd64_dump_node);
2907  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2908  set_op_copy_attr(op, be_copy_attr);
2909  set_op_tag(op, amd64_op_tag);
2910  op_amd64_xor = op;
2911  op = new_ir_op(cur_opcode + iro_amd64_xor_0, "amd64_xor_0", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(amd64_attr_t));
2912  set_op_dump(op, amd64_dump_node);
2913  set_op_attrs_equal(op, amd64_attrs_equal);
2914  set_op_copy_attr(op, be_copy_attr);
2915  set_op_tag(op, amd64_op_tag);
2916  op_amd64_xor_0 = op;
2917  op = new_ir_op(cur_opcode + iro_amd64_xorp, "amd64_xorp", op_pin_state_exc_pinned, irop_flag_none, oparity_variable, -1, sizeof(amd64_binop_addr_attr_t));
2918  set_op_dump(op, amd64_dump_node);
2919  set_op_attrs_equal(op, amd64_binop_addr_attrs_equal);
2920  set_op_copy_attr(op, be_copy_attr);
2921  set_op_tag(op, amd64_op_tag);
2922  op_amd64_xorp = op;
2923  op = new_ir_op(cur_opcode + iro_amd64_xorp_0, "amd64_xorp_0", op_pin_state_floats, irop_flag_constlike, oparity_any, -1, sizeof(amd64_attr_t));
2924  set_op_dump(op, amd64_dump_node);
2925  set_op_attrs_equal(op, amd64_attrs_equal);
2926  set_op_copy_attr(op, be_copy_attr);
2927  set_op_tag(op, amd64_op_tag);
2928  op_amd64_xorp_0 = op;
2929 
2930 }
2931 
2932 void amd64_free_opcodes(void)
2933 {
2934  free_ir_op(op_amd64_add); op_amd64_add = NULL;
2935  free_ir_op(op_amd64_adds); op_amd64_adds = NULL;
2936  free_ir_op(op_amd64_and); op_amd64_and = NULL;
2937  free_ir_op(op_amd64_bsf); op_amd64_bsf = NULL;
2938  free_ir_op(op_amd64_bsr); op_amd64_bsr = NULL;
2939  free_ir_op(op_amd64_call); op_amd64_call = NULL;
2940  free_ir_op(op_amd64_cltd); op_amd64_cltd = NULL;
2941  free_ir_op(op_amd64_cmp); op_amd64_cmp = NULL;
2942  free_ir_op(op_amd64_cmpxchg); op_amd64_cmpxchg = NULL;
2943  free_ir_op(op_amd64_cqto); op_amd64_cqto = NULL;
2944  free_ir_op(op_amd64_cvtsd2ss); op_amd64_cvtsd2ss = NULL;
2945  free_ir_op(op_amd64_cvtsi2sd); op_amd64_cvtsi2sd = NULL;
2946  free_ir_op(op_amd64_cvtsi2ss); op_amd64_cvtsi2ss = NULL;
2947  free_ir_op(op_amd64_cvtss2sd); op_amd64_cvtss2sd = NULL;
2948  free_ir_op(op_amd64_cvttsd2si); op_amd64_cvttsd2si = NULL;
2949  free_ir_op(op_amd64_cvttss2si); op_amd64_cvttss2si = NULL;
2950  free_ir_op(op_amd64_div); op_amd64_div = NULL;
2951  free_ir_op(op_amd64_divs); op_amd64_divs = NULL;
2952  free_ir_op(op_amd64_fadd); op_amd64_fadd = NULL;
2953  free_ir_op(op_amd64_fchs); op_amd64_fchs = NULL;
2954  free_ir_op(op_amd64_fdiv); op_amd64_fdiv = NULL;
2955  free_ir_op(op_amd64_fdup); op_amd64_fdup = NULL;
2956  free_ir_op(op_amd64_fild); op_amd64_fild = NULL;
2957  free_ir_op(op_amd64_fisttp); op_amd64_fisttp = NULL;
2958  free_ir_op(op_amd64_fld); op_amd64_fld = NULL;
2959  free_ir_op(op_amd64_fld1); op_amd64_fld1 = NULL;
2960  free_ir_op(op_amd64_fldz); op_amd64_fldz = NULL;
2961  free_ir_op(op_amd64_fmul); op_amd64_fmul = NULL;
2962  free_ir_op(op_amd64_fpop); op_amd64_fpop = NULL;
2963  free_ir_op(op_amd64_fst); op_amd64_fst = NULL;
2964  free_ir_op(op_amd64_fstp); op_amd64_fstp = NULL;
2965  free_ir_op(op_amd64_fsub); op_amd64_fsub = NULL;
2966  free_ir_op(op_amd64_fucomi); op_amd64_fucomi = NULL;
2967  free_ir_op(op_amd64_fxch); op_amd64_fxch = NULL;
2968  free_ir_op(op_amd64_haddpd); op_amd64_haddpd = NULL;
2969  free_ir_op(op_amd64_idiv); op_amd64_idiv = NULL;
2970  free_ir_op(op_amd64_ijmp); op_amd64_ijmp = NULL;
2971  free_ir_op(op_amd64_imul); op_amd64_imul = NULL;
2972  free_ir_op(op_amd64_imul_1op); op_amd64_imul_1op = NULL;
2973  free_ir_op(op_amd64_jcc); op_amd64_jcc = NULL;
2974  free_ir_op(op_amd64_jmp); op_amd64_jmp = NULL;
2975  free_ir_op(op_amd64_jmp_switch); op_amd64_jmp_switch = NULL;
2976  free_ir_op(op_amd64_l_haddpd); op_amd64_l_haddpd = NULL;
2977  free_ir_op(op_amd64_l_punpckldq); op_amd64_l_punpckldq = NULL;
2978  free_ir_op(op_amd64_l_subpd); op_amd64_l_subpd = NULL;
2979  free_ir_op(op_amd64_lea); op_amd64_lea = NULL;
2980  free_ir_op(op_amd64_leave); op_amd64_leave = NULL;
2981  free_ir_op(op_amd64_mov_gp); op_amd64_mov_gp = NULL;
2982  free_ir_op(op_amd64_mov_imm); op_amd64_mov_imm = NULL;
2983  free_ir_op(op_amd64_mov_store); op_amd64_mov_store = NULL;
2984  free_ir_op(op_amd64_movd); op_amd64_movd = NULL;
2985  free_ir_op(op_amd64_movd_gp_xmm); op_amd64_movd_gp_xmm = NULL;
2986  free_ir_op(op_amd64_movd_xmm_gp); op_amd64_movd_xmm_gp = NULL;
2987  free_ir_op(op_amd64_movdqa); op_amd64_movdqa = NULL;
2988  free_ir_op(op_amd64_movdqu); op_amd64_movdqu = NULL;
2989  free_ir_op(op_amd64_movdqu_store); op_amd64_movdqu_store = NULL;
2990  free_ir_op(op_amd64_movs); op_amd64_movs = NULL;
2991  free_ir_op(op_amd64_movs_store_xmm); op_amd64_movs_store_xmm = NULL;
2992  free_ir_op(op_amd64_movs_xmm); op_amd64_movs_xmm = NULL;
2993  free_ir_op(op_amd64_mul); op_amd64_mul = NULL;
2994  free_ir_op(op_amd64_muls); op_amd64_muls = NULL;
2995  free_ir_op(op_amd64_neg); op_amd64_neg = NULL;
2996  free_ir_op(op_amd64_not); op_amd64_not = NULL;
2997  free_ir_op(op_amd64_or); op_amd64_or = NULL;
2998  free_ir_op(op_amd64_pop_am); op_amd64_pop_am = NULL;
2999  free_ir_op(op_amd64_punpckldq); op_amd64_punpckldq = NULL;
3000  free_ir_op(op_amd64_push_am); op_amd64_push_am = NULL;
3001  free_ir_op(op_amd64_push_reg); op_amd64_push_reg = NULL;
3002  free_ir_op(op_amd64_ret); op_amd64_ret = NULL;
3003  free_ir_op(op_amd64_sar); op_amd64_sar = NULL;
3004  free_ir_op(op_amd64_sbb); op_amd64_sbb = NULL;
3005  free_ir_op(op_amd64_setcc); op_amd64_setcc = NULL;
3006  free_ir_op(op_amd64_shl); op_amd64_shl = NULL;
3007  free_ir_op(op_amd64_shr); op_amd64_shr = NULL;
3008  free_ir_op(op_amd64_sub); op_amd64_sub = NULL;
3009  free_ir_op(op_amd64_sub_sp); op_amd64_sub_sp = NULL;
3010  free_ir_op(op_amd64_subpd); op_amd64_subpd = NULL;
3011  free_ir_op(op_amd64_subs); op_amd64_subs = NULL;
3012  free_ir_op(op_amd64_ucomis); op_amd64_ucomis = NULL;
3013  free_ir_op(op_amd64_xor); op_amd64_xor = NULL;
3014  free_ir_op(op_amd64_xor_0); op_amd64_xor_0 = NULL;
3015  free_ir_op(op_amd64_xorp); op_amd64_xorp = NULL;
3016  free_ir_op(op_amd64_xorp_0); op_amd64_xorp_0 = NULL;
3017 
3018 }
Nothing.
Definition: irop.h:43
unsigned get_irn_opcode(const ir_node *node)
Returns the opcode-enum of the node.
Forking control flow at this operation.
Definition: irop.h:49
ir_graph * get_irn_irg(const ir_node *node)
Returns the ir_graph this node belongs to.
struct ir_op ir_op
Node Opcode.
Definition: firm_types.h:56
void set_op_attrs_equal(ir_op *op, node_attrs_equal_func func)
Sets attrs_equal callback func for operation op.
ir_mode * mode_ANY
undefined mode
Definition: irmode.h:221
void verify_new_node(ir_node *node)
If firm is built in debug mode, verify that a newly created node is fine.
struct dbg_info dbg_info
Source Reference.
Definition: firm_types.h:40
void * get_irn_generic_attr(ir_node *node)
Returns a pointer to the node attributes.
ir_mode * mode_M
memory
Definition: irmode.h:190
This operation jumps to an unknown destination.
Definition: irop.h:59
ir_op * get_irn_op(const ir_node *node)
Returns the opcode struct of the node.
ir_node * optimize_node(ir_node *n)
Applies local optimizations to a single node.
ir_node * new_ir_node(dbg_info *db, ir_graph *irg, ir_node *block, ir_op *op, ir_mode *mode, int arity, ir_node *const *in)
IR node constructor.
This operation is a control flow operation.
Definition: irop.h:45
struct ir_switch_table ir_switch_table
A switch table mapping integer numbers to proj-numbers of a Switch-node.
Definition: firm_types.h:102
ir_mode * mode_T
tuple (none)
Definition: irmode.h:220
Nodes must remain in this basic block.
Definition: firm_types.h:200
This operation can be kept in End&#39;s keep-alive list.
Definition: irop.h:52
ir_mode * mode_Lu
uint64
Definition: irmode.h:201
This operation has a memory input and may change the memory state.
Definition: irop.h:54
Node must remain in this basic block if it can throw an exception, else can float.
Definition: firm_types.h:201
void set_op_copy_attr(ir_op *op, copy_attr_func func)
Sets attribute copy callback func for operation op.
The arity is not fixed by opcode, but statically known.
Definition: irop.h:32
ir_op * new_ir_op(unsigned code, const char *name, op_pin_state p, irop_flags flags, op_arity opar, int op_index, size_t attr_size)
Creates a new IR operation.
This operation has no arguments and is some kind of a constant.
Definition: irop.h:50
unsigned get_next_ir_opcodes(unsigned num)
Returns the next free n IR opcode number, allows to register a bunch of user ops. ...
void set_op_dump(ir_op *op, dump_node_func func)
Sets dump callback func for operation op.
struct ir_entity ir_entity
Entity.
Definition: firm_types.h:83
struct ir_node ir_node
Procedure Graph Node.
Definition: firm_types.h:53
ir_mode * mode_Iu
uint32
Definition: irmode.h:199
void free_ir_op(ir_op *code)
Frees an ir operation.
struct ir_graph ir_graph
Procedure Graph.
Definition: firm_types.h:74
ir_mode * mode_X
execution
Definition: irmode.h:217
Nodes of this opcode can be placed in any basic block.
Definition: firm_types.h:199
Any other arity.
Definition: irop.h:37